AURA: Action-Gated Memory for Robot Policies at Constant VRAM

# AURA: Action-Gated Memory for Robot Policies at Constant VRAM
Source: [https://arxiv.org/html/2606.02775](https://arxiv.org/html/2606.02775)
\(June 2026\)

###### Abstract

The KV\-cache is the right memory for datacenters and the wrong memory for robots\. In a datacenter, many short requests are batched and reset, so an attention cache is amortized across them\. An embodied agent instead runs one endless, non\-resetting episode, so its cache grows without bound on bandwidth\-limited edge hardware where high\-bandwidth memory and flash are scarce and write\-endurance limited—and*memory writes*, not compute, become the binding constraint\. AURA\-Mem \(Action\-Utility Recurrent Adaptive Memory\) is built for that regime: a constant\-size memory wrapped around a frozen vision\-language\-action backbone, with a learned gate that writes only when the current observation would change the next action—memory that knows when to shut up\. The gate is trained directly against a closed\-loop action\-error signal rather than a reconstruction loss\. Its inference state is a fixed4,224 bytesregardless of horizon, versus a growing KV\-cache6,061×\\timeslarger at 100,000 steps\. On a controlled synthetic benchmark, AURA\-Mem matches the best O\(1\) baseline in accuracy at5\.19–6\.13×\\timesfewer writes\(up to9\.19×9\.19\\timeson easier configurations\); budget\-matched random and periodic schedules do not recover this, isolating the gain to the action\-surprise signal\. On a*real*, trained closed\-loop OpenVLA\-OFT 7B panel \(LIBERO\-Long,n=60n\{=\}60episodes/arm\), the gate does not hurt success: AURA\-Mem matches the ungated base \(0\.2330\.233\) and slightly exceeds an always\-write KV arm \(0\.2170\.217\) at7\.0×7\.0\\timesfewer writes and constant memory\. We also instantiate an approximate\-information\-state \(AIS\) value\-loss bound\[[49](https://arxiv.org/html/2606.02775#bib.bib49)\], reported transparently as a methodology demonstration: at this scale the bound is vacuous, not a guarantee\.

## 1Introduction

A robot that runs forever on fixed hardware faces a memory wall that grows by the step\. The standard approach, keeping a Transformer KV\-cache of every past token, is exact but unbounded: cache size grows linearly with the number of control steps, and on edge accelerators that are bandwidth\-limited, reading an ever\-larger cache eventually becomes the binding constraint on latency, not computation\. A multi\-hundred\-step manipulation episode already stresses this budget; an endless navigation or inspection task that runs for tens of thousands of steps makes it fatal\. Yet a robot does not need to reconstruct every past frame\. It needs only*enough state to choose its next action*\.

Every autoregressive inference step issues a memory write: the policy reads its compressed world\-state, selects an action, then writes an updated state vector back to high\-bandwidth memory before the next step begins\. Those writes, not arithmetic, are what fill the scarce, high\-priced memory that currently bottlenecks physical\-AI deployment at scale\. High\-bandwidth memory \(HBM\) is sold out through 2026 across all three major suppliers, with Micron and SK Hynix holding zero uncommitted capacity while together committing over $45 B in capital expenditure to expand output\[[63](https://arxiv.org/html/2606.02775#bib.bib63),[4](https://arxiv.org/html/2606.02775#bib.bib4)\]\. DRAM contract prices surged 90–95% quarter\-over\-quarter in Q1 2026, a single\-quarter record, and NAND flash posted its 17th consecutive monthly price record in May 2026\[[54](https://arxiv.org/html/2606.02775#bib.bib54)\]\. Against this backdrop, SanDisk and SK Hynix have formalized a new*high\-bandwidth flash*\(HBF\) standard targeting AI inference: a 512 GB\-per\-stack, 1\.6 TB/s read\-bandwidth NAND stack in an HBM4\-compatible footprint, with samples planned for H2 2026 and first inference devices for early 2027\[[40](https://arxiv.org/html/2606.02775#bib.bib40)\]\. Because flash memory is governed by finite program/erase cycle endurance, write\-minimizing algorithms directly and proportionally extend the usable lifetime of write\-limited memory\. This makes the frequency of memory writes an architectural variable with hardware economic consequences, not merely a performance metric\.

This observation motivates a different question: rather than asking*how much of the past to keep*, ask*what the past must supply in order for the current action to be near\-optimal*\. The information\-theoretic answer is anaction\-sufficientcompressed state: one that preserves the content relevant to acting well and discards the rest\. Translating that idea into a deployable module requires solving three problems simultaneously: \(i\) the memory must occupy*constant*space regardless of episode length; \(ii\) it must be*written sparingly*so that memory\-bandwidth costs are bounded; and \(iii\) it must be*trained against an action objective*rather than a generic reconstruction objective, so that what is retained reflects action utility rather than token\-level fidelity\.

#### The gap in existing work\.

Recurrent state\-space models \(SSMs\) such as Mamba\[[22](https://arxiv.org/html/2606.02775#bib.bib22)\]and S4\[[23](https://arxiv.org/html/2606.02775#bib.bib23)\]achieve O\(1\) inference\-state memory by design, but they write their state at*every*step, paying full bandwidth costs, and are not trained with an explicit action\-utility bottleneck\. KV\-cache compression and eviction methods \(H2O\[[66](https://arxiv.org/html/2606.02775#bib.bib66)\], Ada\-KV\[[17](https://arxiv.org/html/2606.02775#bib.bib17)\], SnapKV\[[32](https://arxiv.org/html/2606.02775#bib.bib32)\], StreamingLLM\[[58](https://arxiv.org/html/2606.02775#bib.bib58)\], VLA\-Cache\[[59](https://arxiv.org/html/2606.02775#bib.bib59)\]\) reduce cache size but remain fundamentally linear in the horizon: they operate on a*fraction of a growing cache*, not a constant\-size state, and cannot guarantee O\(1\) VRAM at unbounded horizons\. Neither family provides a quantitative link between the quality of the compressed state and closed\-loop task performance\. The approximate information state \(AIS\) framework ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]provides the structural form of such a link, a value\-loss bound of the form‖V∗−VπZ‖∞≤2​\(ε\+γ​LV​δ\)/\(1−γ\)\\\|V^\{\*\}\-V^\{\\pi\_\{Z\}\}\\\|\_\{\\infty\}\\leq 2\(\\varepsilon\+\\gamma L\_\{V\}\\delta\)/\(1\-\\gamma\), but it has not previously been instantiated for a*bounded, sparsely\-written, recurrent*memory module in an embodied\-control setting, nor have its premisesε\\varepsilonandδ\\deltabeen measured empirically for such a module; as we show, the instantiated bound is loose at current scale\.

#### The novelty\.

AURA\-Mem advances the write\-bandwidth frontier through a four\-way conjunction absent from all prior bounded\-state and embodied\-memory work:\(1\)a learned*action\-utility write gate*whose trigger signal is the policy’s own action\-prediction error, not perplexity gradient, not recency eviction, not spatial prediction;\(2\)an*action\-information\-bottleneck*\(action\-IB\) training objective that back\-propagates the closed\-loop action\-chunk loss through the gate decision, directly aligning write selection with decision quality;\(3\)a*training\-time*write\-rate control \(ρ\\rho, the target write rate, withγ\\gammaits penalty weight\) that places the model anywhere on the write\-bandwidth/accuracy frontier by selecting a target at train time, characterized empirically \(Fig\.[13](https://arxiv.org/html/2606.02775#S6.F13)\); and\(4\)a measured\(ε,δ\)\(\\varepsilon,\\delta\)\-*action\-information\-state certificate*, an instantiation of the bound ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\], measured empirically on the shipped checkpoint \(εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}=0\.0021,εq​95=0\.0076\\varepsilon\_\{q95\}=0\.0076; theLVL\_\{V\}\-loaded bound is vacuous at current scale, so the informative quantity is the measuredε\\varepsilon\)\. The empirical result is accuracy*parity*with the best O\(1\) baseline \(fixed\_size\_state\) at 4\.98–9\.19×\\timesfewer memory writes; the established story is the write\-bandwidth frontier, not accuracy superiority\. The closest structural sibling, Tensor Cache\[[52](https://arxiv.org/html/2606.02775#bib.bib52)\], shares the outer\-product fast\-weight substrate but writes on sliding\-window eviction, trains on a language\-modeling objective, and provides no control\-rate conditioning and no action\-sufficiency certificate; AURA\-Mem differs on all four remaining axes simultaneously\.

#### Contributions\.

We make four honest, independently falsifiable contributions:

1. 1\.Write\-bandwidth frontier \(primary\)\.At matched task success on memory\-dependent synthetic benchmarks, AURA\-Mem achieves4\.98–9\.19×\\timesfewer memory writes per second than a write\-everything dense baseline while maintaining statistically equivalent accuracy \(paired bootstrap CI includes 0 atN=64N\{=\}64;≥3\\geq 3seeds\)\. Budget\-matched naïve write strategies \(random and periodic gating\) fail to recover this accuracy at the same write rate \(success≈0\.366\\approx 0\.366–0\.3750\.375versus AURA\-Mem1\.0001\.000atN=64N\{=\}64onnoisy\_long\_recall\)\. A learned token\-loss gate trained at the same state size collapses \(g=0g\{=\}0always\), isolating the gain to the*action\-surprise*signal\. Memory writes translate directly to DRAM/HBM bandwidth consumed on memory\-constrained accelerators\[[21](https://arxiv.org/html/2606.02775#bib.bib21)\]; the write\-bandwidth axis is therefore the correct efficiency measure for hardware\-constrained embodied deployment\.
2. 2\.O\(1\) constant inference\-state VRAM \(measured\)\.111Throughout, O\(1\) refers to the*carried inference state*only; training\-time activation memory is O\(TT\) under backpropagation through time, as in any recurrent network\.AURA\-Mem’s fast\-weight state occupies a fixed4,224 bytesat the sweep configuration \(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, batch=1=1, fp32\), computed analytically as\(dk​dv\+dv\)×batch×4\(d\_\{k\}d\_\{v\}\+d\_\{v\}\)\\times\\text\{batch\}\\times 4\. Over a100,000\-stependless rollout on a real L40S GPU, this figure is confirmed constant across all 500 logged checkpoints, while a matched growing\-KV reference reaches25,600,000 bytesat 100,000 steps, a6,061×\\timeslarger footprint\. This is a structural property: the shape of the fast\-weight tensorW∈ℝB×dk×dvW\\in\\mathbb\{R\}^\{B\\times d\_\{k\}\\times d\_\{v\}\}is independent of the step counttt\. The long\-horizon6,061×6\{,\}061\\timesfigure is an analytic extrapolation against a matched\-dimension KV stub; for the regime where we can*train*both sides, the next contribution supplies a competent trained transformer baseline\.
3. 3\.Action\-sufficiency bound \(instantiation ofSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49)\)\.We instantiate the approximate\-information\-state value\-loss bound ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]\(JMLR 2022, Thm\. 9/27\) for the AURA\-Mem setting and measure its premises on the real shipped checkpoint\. Action\-prediction sufficiency is strong \(εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}=0\.0021, 95% CI\[0\.0020,0\.0023\]\[0\.0020,0\.0023\];εq​95=0\.0076\\varepsilon\_\{q95\}=0\.0076\), but the instantiatedLVL\_\{V\}\-loaded value\-loss bounds arevacuousat current scale \(guaranteed form52\.6952\.69; trivial value span10\.010\.0\)\. We report this as a methodology demonstration: an*action\-sufficiency value\-loss bound*in the sense ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\], not a formal guarantee \(see §[4](https://arxiv.org/html/2606.02775#S4)\)\.
4. 4\.Trained KV\-cache head\-to\-head and a real\-VLA panel\.Against a*trained*, position\-aware growing\-KV transformer \(relative\-age positional encoding on its keys, a standard component\) on a sparse\-recall task, AURA\-Mem reaches accuracy*parity*across horizonsT=128T\{=\}128–10241024\(both≈1\.000\{\\approx\}1\.000;n=3n\{=\}3seeds, small\) while holding its inference state constant; the KV baseline matches accuracy only by growing its state linearly \(62\.1×62\.1\\timesas many bytes atT=1024T\{=\}1024,606×606\\timesatT=10,000T\{=\}10\{,\}000, crossover nearT=17T\{=\}17\)\. We additionally run the AURA\-Mem memory and the\(ε,δ\)\(\\varepsilon,\\delta\)AIS measurement on a*real*OpenVLA\-OFT 7B policy in closed\-loop LIBERO\-Long rollouts, demonstrating the mechanism on a real 4,096\-dim policy stream \(O\(1\) state at 4,224 bytes\) rather than a toy\. This panel is a zero\-shot proof\-of\-mechanism, not a state\-of\-the\-art success sweep, and AURA\-Mem is a memory/measurement layer that does not by itself raise robot success\.

#### Paper organization\.

Section[2](https://arxiv.org/html/2606.02775#S2)reviews related work\. Section[3](https://arxiv.org/html/2606.02775#S3)describes the AURA\-Mem architecture\. Section[4](https://arxiv.org/html/2606.02775#S4)presents the action\-sufficiency bound and its empirical instantiation\. Section[5](https://arxiv.org/html/2606.02775#S5)describes experiments\. Section[6](https://arxiv.org/html/2606.02775#S6)presents results\. Section[7](https://arxiv.org/html/2606.02775#S7)discusses limitations\. Section[8](https://arxiv.org/html/2606.02775#S8)concludes\.

## 2Related Work

### 2\.1Linear attention, state space models, and fast\-weight programmers

Structured state\-space models \(S4\[[23](https://arxiv.org/html/2606.02775#bib.bib23)\], S5\[[47](https://arxiv.org/html/2606.02775#bib.bib47)\], Mamba\[[22](https://arxiv.org/html/2606.02775#bib.bib22)\], and Mamba\-2/SSD\[[14](https://arxiv.org/html/2606.02775#bib.bib14)\]\) replace quadratic\-cost attention with fixed\-size recurrences that achieve O\(1\) inference\-state VRAM, and linear\-attention variants \(RWKV\[[42](https://arxiv.org/html/2606.02775#bib.bib42)\], RetNet\[[50](https://arxiv.org/html/2606.02775#bib.bib50)\], GLA\[[61](https://arxiv.org/html/2606.02775#bib.bib61)\], Based\[[3](https://arxiv.org/html/2606.02775#bib.bib3)\], Performers\[[12](https://arxiv.org/html/2606.02775#bib.bib12)\]\) offer similar asymptotic benefits through kernel approximations\. All of these architectures write to their recurrent state at*every*time step: Mamba’s input\-selective gating modulates which dimensions are updated but never skips a step outright\. Fast\-weight programmers\[[5](https://arxiv.org/html/2606.02775#bib.bib5)\]and their formalization as linear Transformers\[[46](https://arxiv.org/html/2606.02775#bib.bib46)\]show that outer\-product activations serve as rapidly rewritten associative memories; modern Hopfield networks\[[44](https://arxiv.org/html/2606.02775#bib.bib44)\]establish exponential associative capacity in continuous state spaces\. Test\-time training \(TTT\)\[[51](https://arxiv.org/html/2606.02775#bib.bib51)\]and its descendants \(Titans\[[8](https://arxiv.org/html/2606.02775#bib.bib8)\], Atlas\[[6](https://arxiv.org/html/2606.02775#bib.bib6)\], MIRAS\[[7](https://arxiv.org/html/2606.02775#bib.bib7)\], LaCT\[[65](https://arxiv.org/html/2606.02775#bib.bib65)\]\) extend this lineage by learning the fast\-weight update rule via self\-supervised signals at test time, treating the fast\-weight matrix as a compressed context window; Titans specifically uses the gradient of an associative\-memory \(perplexity\-style\) loss as the gate signal and trains end\-to\-end on a language\-modeling objective\. Gated DeltaNet\-2\[[26](https://arxiv.org/html/2606.02775#bib.bib26)\]adds per\-step decoupled channel\-wise erase and write gates to linear attention, also firing at every step with no write sparsity\. AURA\-Mem inherits the bounded\-state substrate of this family but departs on three axes absent from all of the above: the write\-gate signal is*action\-utility surprise*\(not step\-clock, perplexity gradient, or spatial prediction\); the gate is trained against a closed\-loop action\-chunk and action\-IB objective \(not a language\-modeling loss\); and it exposes a training\-time write\-rate control \(ρ\\rho, withγ\\gammaits penalty weight\) that places the model on the write\-bandwidth/accuracy frontier\.

### 2\.2KV\-cache compression, eviction, and bounded fast\-weight memory

Eviction\-based methods \(H2O\[[66](https://arxiv.org/html/2606.02775#bib.bib66)\], StreamingLLM\[[58](https://arxiv.org/html/2606.02775#bib.bib58)\], SnapKV\[[32](https://arxiv.org/html/2606.02775#bib.bib32)\], FastGen\[[19](https://arxiv.org/html/2606.02775#bib.bib19)\], ScissorHands\[[35](https://arxiv.org/html/2606.02775#bib.bib35)\], KIVI\[[36](https://arxiv.org/html/2606.02775#bib.bib36)\], KVQuant\[[27](https://arxiv.org/html/2606.02775#bib.bib27)\], AdaKV\[[17](https://arxiv.org/html/2606.02775#bib.bib17)\], VL\-Cache\[[57](https://arxiv.org/html/2606.02775#bib.bib57)\], PagedAttention\[[31](https://arxiv.org/html/2606.02775#bib.bib31)\]\) reduce KV\-cache footprint but operate on caches that remain asymptotically growing with context length; they bound cache size to a*window*, not to O\(1\)\. The two most recent bounded fast\-weight entries are the closest structural siblings to AURA\-Mem\. Tensor Cache\[[52](https://arxiv.org/html/2606.02775#bib.bib52)\]establishes fixed\-size outer\-product fast\-weight matrices as the substrate for bounded Transformer memory and trains per\-head decay and write\-rate parameters end\-to\-end on a language\-modeling objective: the same substrate AURA\-Mem adopts\. Tensor Cache writes on*window eviction*\(a recency/positional trigger\), operates in a text\-only domain with no control\-rate conditioning, and provides no action\-sufficiency certificate; AURA\-Mem writes on*action\-utility surprise*\(a decision\-relevance trigger\), trains against a closed\-loop action\-chunk and action\-IB objective, conditions on the deployed control rate, and provides a measured\(ε,δ\)\(\\varepsilon,\\delta\)\-AIS certificate\. Tensor Memory\[[53](https://arxiv.org/html/2606.02775#bib.bib53)\], a concurrent fixed\-size recurrent tensor whose tokens write via differentiable soft\-write into predicted 3D voxel positions, shares the O\(1\)\-VRAM property but uses a spatial/geometric write trigger and a perception objective, with no control\-rate knob and no sufficiency certificate\. The categorical distinction between eviction and AURA\-Mem’s design is structural: at 100 k inference steps, a comparable KV\-cache stub \(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32\) requires6,061×6\{,\}061\\timesthe bytes of AURA\-Mem’s constant state, a gap that no eviction scheme closes by design\.

### 2\.3VLA memory and KV eviction for embodied policies

VLA\-specific compression methods bring learned eviction into the embodied domain but remain in the eviction family\. VLA\-Cache\[[59](https://arxiv.org/html/2606.02775#bib.bib59)\]and KV\-Efficient VLA\[[60](https://arxiv.org/html/2606.02775#bib.bib60)\]apply learned RNN or token\-utility gates to KV\-cache eviction for robot policies; unlike AURA\-Mem, both operate on growing KV\-caches \(no O\(1\)\-VRAM guarantee at unbounded horizon\), train against token\-level surrogate objectives rather than a closed\-loop action loss, and provide no action\-sufficiency certificate\. DySta\[[43](https://arxiv.org/html/2606.02775#bib.bib43)\]learns a Gumbel\-softmax recache gate for VLA inference; its gate regularizer penalizes sparsity based on a temporal\-change signal \(image similarity across timesteps\),*not*a closed\-loop action\-prediction loss, and its chunked KV\-cache grows with context length\. EfficientVLA\[[62](https://arxiv.org/html/2606.02775#bib.bib62)\]and the KV policy ofMoschella et al\. \[[39](https://arxiv.org/html/2606.02775#bib.bib39)\]follow the same eviction pattern\. MEM\[[56](https://arxiv.org/html/2606.02775#bib.bib56)\]uses a video encoder plus text journal for multi\-scale embodied memory; it applies no learned action\-utility write gate, and its store grows with episode length\. CSR\[[2](https://arxiv.org/html/2606.02775#bib.bib2)\]uses KV\-cache reuse via prefix stability and asynchronous eviction for infinite\-horizon robot policies; its cache remains asymptotically growing\. AURA\-Mem is categorically distinct: its O\(1\) inference\-state VRAM is fixed at initialization and does not grow with horizon\. Looking forward, unified world\-action foundation models such as NVIDIA’s Cosmos 3 \(GTC 2026\) inherit the same growing carried\-state problem in batch\-1 embodied deployment, which makes bounded memory*more*relevant as policy backbones scale, not less\. The concurrent SANA\-WM world model uses a Hybrid Gated DeltaNet that keeps its recurrent state at a constantD×DD\\times Dsize regardless of video length—independent industrial validation of AURA\-Mem’s bounded\-state premise\. AURA\-Mem’s learned write\-gating is complementary and orthogonal to these backbones: it can wrap any such policy to add selective, constant\-footprint memory\.

### 2\.4Memory architectures for reinforcement learning and robot policies

Classical RL memory approaches \(RL2\[[16](https://arxiv.org/html/2606.02775#bib.bib16)\], R2D2\[[29](https://arxiv.org/html/2606.02775#bib.bib29)\], Decision Transformer\[[10](https://arxiv.org/html/2606.02775#bib.bib10)\], DreamerV2\[[25](https://arxiv.org/html/2606.02775#bib.bib25)\]\) and locomotion controllers \(RMA\[[30](https://arxiv.org/html/2606.02775#bib.bib30)\], POPGym\[[38](https://arxiv.org/html/2606.02775#bib.bib38)\]\) establish the need for bounded recurrent state in partially observable settings but do not connect state size to a formal sufficiency bound\. Recent robot\-policy memory works \(ELMUR\[[11](https://arxiv.org/html/2606.02775#bib.bib11)\], GMP\[[18](https://arxiv.org/html/2606.02775#bib.bib18)\], RoboMamba\[[34](https://arxiv.org/html/2606.02775#bib.bib34)\], MemER\[[48](https://arxiv.org/html/2606.02775#bib.bib48)\], Memo\[[24](https://arxiv.org/html/2606.02775#bib.bib24)\]\) address long\-horizon manipulation but use growing external stores or unconditional write schedules and provide no certificate\. RoboMME\[[13](https://arxiv.org/html/2606.02775#bib.bib13)\]benchmarks 16 robot\-memory tasks across 14 memory\-architecture variants, finding that naïve test\-time training updates do*not*reliably improve memory quality across tasks, a negative result that directly motivates AURA\-Mem’s design choice of an offline\-trained, action\-utility\-gated write mechanism rather than online gradient\-based writes\. None of the 14 variants achieves O\(1\) inference\-state VRAM or provides an action\-sufficiency certificate\.

### 2\.5Surprise and information\-gain gating

ICM\[[41](https://arxiv.org/html/2606.02775#bib.bib41)\]and RND\[[9](https://arxiv.org/html/2606.02775#bib.bib9)\]use forward\-model prediction error as an intrinsic exploration reward, driving agents toward novel states\. This use of surprise is*extrinsic to the memory mechanism*: it governs action selection, not memory management\. AURA\-Mem repurposes the same mathematical object, forward\-model prediction error, for an orthogonal purpose: gating*when*the fast\-weight state is updated\. The gate signal is*action\-utility*surprise, the discrepancy between the policy’s predicted action and the actual action token, so the write criterion is directly aligned with decision quality rather than environmental novelty\. The action\-IB objective then regularizes the information rate between the written state and the action sequence, jointly minimizing write bandwidth and maximizing action fidelity\. No prior exploration\-bonus work or information\-bottleneck formulation\[[55](https://arxiv.org/html/2606.02775#bib.bib55),[1](https://arxiv.org/html/2606.02775#bib.bib1)\]in RL conditions on action\-prediction error to gate memory writes within a bounded\-state O\(1\)\-VRAM architecture\.

### 2\.6State representation theory and action\-sufficiency certificates

The approximate\-information\-state \(AIS\) framework ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]\(JMLR 2022\) formalizes what a finite state must satisfy to support near\-optimal decisions in POMDPs, providing the theoretical backbone for AURA\-Mem’s certificate\. Related state\-representation theory \(predictive state representations\[[33](https://arxiv.org/html/2606.02775#bib.bib33)\], DeepMDP\[[20](https://arxiv.org/html/2606.02775#bib.bib20)\], DBC\[[64](https://arxiv.org/html/2606.02775#bib.bib64)\], belief compression\[[45](https://arxiv.org/html/2606.02775#bib.bib45)\]\) characterizes when compact representations suffice for control but does not instantiate measurable\(ε,δ\)\(\\varepsilon,\\delta\)bounds on rollouts\. AURA\-Mem instantiates the AIS bound ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]and measuresε\\varepsilonandδ\\deltaempirically on the visited distribution of policy rollouts \(εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}=0\.0021,εq​95=0\.0076\\varepsilon\_\{q95\}=0\.0076\); theLVL\_\{V\}\-loaded bound is vacuous at current scale, so we report the measuredε\\varepsilonas the informative quantity and do not claim a formal guarantee of policy optimality\. Factored Diffusion Policies\[[37](https://arxiv.org/html/2606.02775#bib.bib37)\]provide a closed\-loop trajectory\-tube certificate for*policy\-composition generalization*, a distinct object that certifies generalization across task distributions, whereas AURA\-Mem’s certificate bounds value sub\-optimality incurred by finite memory size\. The memory wall\[[21](https://arxiv.org/html/2606.02775#bib.bib21)\]quantifies why this matters at system scale: compute has improved roughly60,000×60\{,\}000\\timesover twenty years while DRAM bandwidth has improved only100×100\\times; FlashAttention\[[15](https://arxiv.org/html/2606.02775#bib.bib15)\]and data\-movement analysis\[[28](https://arxiv.org/html/2606.02775#bib.bib28)\]confirm that memory I/O, not arithmetic, dominates inference cost for attention\-class architectures\. AURA\-Mem’s 4\.98–9\.19×\\timeswrite sparsity \(measured across budget levelsN∈\{16,32,64\}N\\in\\\{16,32,64\\\}\) directly reduces this dominant cost\.

Table 1:Comparison of memory architectures on six discriminating axes\.Gate: a learned write\-gate \(not a fixed write schedule\)\.Act\. obj\.: trained against a closed\-loop action\-prediction objective \(not a language\-modeling loss\)\.Rate\-knob: a deployable writes\-per\-second budget conditioned on the control rate\.O\(1\) VRAM: inference\-state size fixed at initialization, independent of episode length\.AIS cert\.: a measured\(ε,δ\)\(\\varepsilon,\\delta\)\-action\-sufficiency certificate \(instantiation ofSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49)\)\.Robot: targeting robot or VLA deployment\.✓= yes;✗= no;∼\\sim= partial \(see text\)\.MethodGateAct\. obj\.Rate\-knobO\(1\) VRAMAIS cert\.RobotTitans\[[8](https://arxiv.org/html/2606.02775#bib.bib8)\]✓✗✗✓✗✗Tensor Cache\[[52](https://arxiv.org/html/2606.02775#bib.bib52)\]∼\\sim✗✗✓✗✗Gated DeltaNet\-2\[[26](https://arxiv.org/html/2606.02775#bib.bib26)\]∼\\sim✗✗✓✗✗DySta\[[43](https://arxiv.org/html/2606.02775#bib.bib43)\]✓✗✗✗✗✓KV\-Efficient VLA\[[60](https://arxiv.org/html/2606.02775#bib.bib60)\]✓✗✗✗✗✓MEM\[[56](https://arxiv.org/html/2606.02775#bib.bib56)\]✗✗✗✗✗✓RoboMME\[[13](https://arxiv.org/html/2606.02775#bib.bib13)\]∼\\sim✗✗✗✗✓Factored Diffusion\[[37](https://arxiv.org/html/2606.02775#bib.bib37)\]✗✓✗✗∼\\sim✓AURA\-Mem \(ours\)✓✓✓✓✓✓

## 3Method: AURA\-Mem

AURA\-Mem \(Action\-UtilityRecurrentAdaptiveMemory\) isone bounded fast\-weight recurrent statethat a policy carries across an episode: updated test\-time\-training style, written*only*on action\-relevant surprise, and trained against a*closed\-loop action objective*\. There is exactly one state object, one write gate, and one training loss\. We describe the memory as a single fixed\-size recurrent statistic withO\(1\) inference\-state VRAM; we never describe our method as KV\-cache eviction or as a fraction of a growing cache\. The eviction methods of §[2](https://arxiv.org/html/2606.02775#S2)\(H2O, Ada\-KV, SnapKV, VLA\-Cache\) are a*baseline family we compare against*on a common memory\-bytes axis, not a description of AURA\-Mem\. The full control loop —a learned write gate and a bounded O\(1\) state wrapped around a*frozen*VLA backbone—is sketched in Figure[1](https://arxiv.org/html/2606.02775#S3.F1), and the single control\-step datapath is shown in Figure[2](https://arxiv.org/html/2606.02775#S3.F2)\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x1.png)Figure 1:AURA\-Mem in one picture: memory that knows when to shut up\.The whole system is a learned*write gate*plus a bounded fast\-weight state wrapped around afrozenVLA backbone\. At each tick the observationoto\_\{t\}is summarised by the frozen backbone \(OpenVLA\-OFT 7B, weights unchanged\) into a latent tokenzt=proj​\(ht\)z\_\{t\}\{=\}\\mathrm\{proj\}\(h\_\{t\}\)\. An action\-error write gategt=𝟏​\[pt\>τ\]g\_\{t\}\{=\}\\mathbf\{1\}\[p\_\{t\}\{\>\}\\tau\]decides whether to write: it fires*only on surprise*, so most steps carry the state over untouched\. The bounded fast\-weight stateW∈ℝdk×dvW\\in\\mathbb\{R\}^\{d\_\{k\}\\times d\_\{v\}\}hasO\(1\) inference\-state VRAM—a constant4,2244\{,\}224bytes \(batch 1, fp32\) regardless of horizon—and is read back asrtr\_\{t\}, which conditions the next actionata\_\{t\}; the executed action changes the world, closing the loop into the next observation \(dashed arc\)\. The two AURA\-Mem contributions are highlighted: thelearned write gate\(writes only when the incoming token is action\-relevant surprise\) and thebounded O\(1\) state\(constant bytes, never a growing cache\)\. The backbone is never fine\-tuned; only the lightweight gate, projections, and memory read/write heads are trained\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x2.png)Figure 2:AURA\-Mem single control\-step datapath\.At each tickttthe frozen backbone summarises the raw observation into a latent tokenzt∈ℝdz\_\{t\}\\in\\mathbb\{R\}^\{d\}\. Three linear projections emit a queryq=θQ​zq\{=\}\\theta\_\{Q\}z, keyk=θK​zk\{=\}\\theta\_\{K\}z, and valuev=θV​zv\{=\}\\theta\_\{V\}z; the fast\-weight stateW∈ℝdk×dvW\\in\\mathbb\{R\}^\{d\_\{k\}\\times d\_\{v\}\}is*read*first viao=q⊤​Wo\{=\}q^\{\\top\}Wto produce the memory output before any write occurs\. The*surprise*scalars=‖k​W−v‖22s\{=\}\\\|kW\-v\\\|\_\{2\}^\{2\}\(the inner TTT reconstruction error, detached from the gradient graph\) is fed together withzzand the previous readoointo a small GateMLP, which emits a soft gate probabilitypt=σ​\(ℓ/τ\)p\_\{t\}\{=\}\\sigma\(\\ell/\\tau\); a straight\-through binariser producesgt∈\{0,1\}g\_\{t\}\{\\in\}\\\{0,1\\\}in the forward pass while passing soft gradients backward\. The gated TTT write isW←g⋅TTT​\(W,z\)\+\(1−g\)⋅WW\\leftarrow g\\cdot\\mathrm\{TTT\}\(W,z\)\+\(1\{\-\}g\)\\cdot W: wheng=0g\{=\}0the state is carried over byte\-for\-byte and no write traffic is incurred\. The readoopasses to the ActionIB head, which mapso→\(μ,log⁡σ2\)o\\to\(\\mu,\\log\\sigma^\{2\}\), samplesz′∼𝒩​\(μ,σ2\)z^\{\\prime\}\\sim\\mathcal\{N\}\(\\mu,\\sigma^\{2\}\)\(reparameterisation; meanμ\\muat eval\), and predicts the action chunk; the training loss isℒ=ℒaction\+β​ℒIB\+γ​ℒwrite\\mathcal\{L\}=\\mathcal\{L\}\_\{\\text\{action\}\}\+\\beta\\,\\mathcal\{L\}\_\{\\text\{IB\}\}\+\\gamma\\,\\mathcal\{L\}\_\{\\text\{write\}\}\. At budgetN=32N\{=\}32the architecture uses 30,279 total parameters \(21,447 gradient\-active; sweep configdmodel=64d\_\{\\text\{model\}\}\{=\}64,dk=dv=Nd\_\{k\}\{=\}d\_\{v\}\{=\}N\); parameter counts scale withNN\(20,935 / 30,279 / 55,111 total atN=16/32/64N\{=\}16/32/64\)\. At every budget the parity variants are exactly parameter\-matched; the GateMLP contributes\+6,337\+6\{,\}337gradient\-active parameters not present in the write\-every\-step baseline, a capacity asymmetry disclosed in §[7](https://arxiv.org/html/2606.02775#S7)and Appendix[B\.2](https://arxiv.org/html/2606.02775#A2.SS2)\.### 3\.1Problem setup: VLA policy as a POMDP

We model a robot policy as a discrete\-time partially observed Markov decision process \(POMDP\)\. At each control tickttthe agent receives an observationYt∈𝒴Y\_\{t\}\\in\\mathcal\{Y\}\(an image/proprioception frame, summarized by the frozen VLA backbone into a per\-frame token vectorzt∈ℝdz\_\{t\}\\in\\mathbb\{R\}^\{d\}\), emits an actionAt∈𝒜A\_\{t\}\\in\\mathcal\{A\}\(e\.g\. a 6\-DoF end\-effector delta plus gripper,daction=7d\_\{\\text\{action\}\}\{=\}7in the default config\), and collects a bounded rewardRt∈\[Rmin,Rmax\]R\_\{t\}\\in\[R\_\{\\min\},R\_\{\\max\}\]under discountγ∈\(0,1\)\\gamma\\in\(0,1\)\. The latent stateStS\_\{t\}is never observed\. The*history*Ht=\(Y1:t,A1:t−1\)∈ℋtH\_\{t\}=\(Y\_\{1:t\},A\_\{1:t\-1\}\)\\in\\mathcal\{H\}\_\{t\}is itself an \(intractably large\) information state: the system is Markov inHtH\_\{t\}and an exact dynamic program exists on histories with valueVt​\(ht\)V\_\{t\}\(h\_\{t\}\)and action\-valueQt​\(ht,at\)Q\_\{t\}\(h\_\{t\},a\_\{t\}\)\.

#### The memory\-bandwidth / O\(1\)\-VRAM problem\.

The standard Transformer realization of “condition onHtH\_\{t\}” is a KV\-cache of shape\[B,T,…\]\[B,T,\\dots\]whose lengthTTequals the step count\. On embodied hardware \(edge SoCs with bounded HBM/LPDDR\), this linearly growing cache is the binding constraint: VRAM grows with horizon until the policy throttles or OOMs, and every step re\-reads an ever\-larger cache, so*memory bandwidth*\(bytes moved per second\), not FLOPs, dominates\. The design goal is a policy whose resident inference state and per\-step memory traffic areconstant in the episode lengthwhile preserving the information needed to act well\. AURA\-Mem attacks this by replacing the growing cache with one fixed\-size recurrent state that \(i\) costs constant inference\-state VRAM because the recurrent state is a fixed\-shape tensor allocated at initialization, so its byte footprint is independent of the rollout horizonTT\(§[3\.2](https://arxiv.org/html/2606.02775#S3.SS2)\), \(ii\) is written sparsely to bound writes\-per\-second \(§[3\.3](https://arxiv.org/html/2606.02775#S3.SS3)\), and \(iii\) is trained to be action\-sufficient \(§[3\.4](https://arxiv.org/html/2606.02775#S3.SS4)\)\.

### 3\.2The single state object: a bounded fast\-weight stateWW

The entire memory is one tensor\. TheGatedTTTStatecarries a fast\-weight matrix

Wt∈ℝB×dk×dv,W\_\{t\}\\in\\mathbb\{R\}^\{B\\times d\_\{k\}\\times d\_\{v\}\},a small*linear model*whose weights*are*the memory\. Reading the memory is a linear map of a query; writing it is an online \(test\-time\-training\) gradient step that folds the current frame into the*values*of this fixed\-shape tensor\. The shape ofWWnever depends ontt: history is absorbed into the*contents*of a constant\-shape matrix, never appended as new rows the way a KV\-cache is\.

#### Read\.

A query is projected from the frame summary and applied to the fast weights:

qt=θQ​zt∈ℝdk,ot=qt⊤​Wt∈ℝdv,q\_\{t\}=\\theta\_\{Q\}z\_\{t\}\\in\\mathbb\{R\}^\{d\_\{k\}\},\\qquad o\_\{t\}=q\_\{t\}^\{\\top\}W\_\{t\}\\in\\mathbb\{R\}^\{d\_\{v\}\},implemented as`torch\.einsum\("bk,bkv\-\>bv", q, W\)`\. The readoto\_\{t\}is the memory output passed to the action head; it is the realized read of the stateZtZ\_\{t\}\.

#### Inner objective and update rule\.

The fast weights store an associative key→\\tovalue map\. With keykt=θK​ztk\_\{t\}=\\theta\_\{K\}z\_\{t\}and valuevt=θV​ztv\_\{t\}=\\theta\_\{V\}z\_\{t\}, the self\-supervised inner loss is the TTT\-Linear / delta\-rule reconstruction:

ℒtinner​\(W\)=‖kt⊤​W−vt‖22\.\\mathcal\{L\}^\{\\text\{inner\}\}\_\{t\}\(W\)=\\bigl\\\|k\_\{t\}^\{\\top\}W\-v\_\{t\}\\bigr\\\|\_\{2\}^\{2\}\.One test\-time\-training step with a learned decay then updates the state:

Wt=\(1−α\)​Wt−1−η​∇Wℒtinner​\(Wt−1\)\\boxed\{W\_\{t\}\\;=\\;\(1\-\\alpha\)\\,W\_\{t\-1\}\\;\-\\;\\eta\\,\\nabla\_\{W\}\\,\\mathcal\{L\}^\{\\text\{inner\}\}\_\{t\}\(W\_\{t\-1\}\)\}where the gradient of the linear delta rule is available in closed form,∇Wℒtinner=2​kt​\(kt⊤​Wt−1−vt\)\\nabla\_\{W\}\\mathcal\{L\}^\{\\text\{inner\}\}\_\{t\}=2\\,k\_\{t\}\(k\_\{t\}^\{\\top\}W\_\{t\-1\}\-v\_\{t\}\), so no inner autograd loop is needed\. The scalars are*meta\-learned*\(outer loop\) and kept in range by reparameterization: the inner learning rateη=exp⁡\(ηraw\)\>0\\eta=\\exp\(\\eta\_\{\\text\{raw\}\}\)\>0and the forgetting gateα=sigmoid​\(αraw\)∈\(0,1\)\\alpha=\\mathrm\{sigmoid\}\(\\alpha\_\{\\text\{raw\}\}\)\\in\(0,1\)\.

#### Whymemory\_bytesis constant \(O\(1\) inference\-state VRAM\)\.

The only tensors carried across control steps areWWof shape\[B,dk,dv\]\[B,d\_\{k\},d\_\{v\}\]and the transient previous read of shape\[B,dv\]\[B,d\_\{v\}\]\. Neither depends ontt\. Hence:

memory\_bytes​\(B,dtype\)=\(B​dk​dv\+B​dv\)⋅element\_size​\(dtype\),\\texttt\{memory\\\_bytes\}\(B,\\text\{dtype\}\)=\\bigl\(B\\,d\_\{k\}d\_\{v\}\+B\\,d\_\{v\}\\bigr\)\\cdot\\texttt\{element\\\_size\}\(\\text\{dtype\}\),a pure function of\(dk,dv,B,dtype\)\(d\_\{k\},d\_\{v\},B,\\text\{dtype\}\)andindependent of the number of steps\. In the dedicated batch=1=1horizon\-stress configuration \(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32,B=1B\{=\}1, fp32;stress\_endless\.py,sparse\_recall\) this evaluates to exactly\(32×32\+32\)×1×4=4,224\(32\{\\times\}32\+32\)\{\\times\}1\{\\times\}4=4\{,\}224bytes; the sweep’s per\-budget state is larger but likewise constant inTT\. This is the constant\-VRAM property verified empirically at 100 k steps on a real L40S GPU \(§[6\.2](https://arxiv.org/html/2606.02775#S6.SS2)\)\. The claim applies to the*inference state only*: training\-time activation memory is O\(TT\) under backpropagation through time, as in any recurrent network\.

### 3\.3The surprise / action\-error write gate

Reading happens every control tick \(an action is required at every tick\), but*writing*, firing the TTT update above, is gated\. A learned binary surprise gategt∈\{0,1\}g\_\{t\}\\in\\\{0,1\\\}decides whether stepttcarries enough action\-relevant novelty to be worth a write; most embodied steps are uninformative and skip the write, leaving the state unchanged\.

#### Surprise signal\.

The surprise scalar is the magnitude of the current inner prediction error \(how poorly the present fast weights already explain the incoming frame\), normalized by a running mean/std:

st=normalize​\(ℒtinner​\(Wt−1\)\)\.s\_\{t\}=\\mathrm\{normalize\}\\\!\\bigl\(\\mathcal\{L\}^\{\\text\{inner\}\}\_\{t\}\(W\_\{t\-1\}\)\\bigr\)\.

#### Gate\.

A small MLP consumes the frame summary, the previous read, and the surprise scalar and emits a logit:

ℓt=GateMLP​\(\[zt,ot−1,st\]\),pt=sigmoid​\(ℓt/τ\)\.\\ell\_\{t\}=\\mathrm\{GateMLP\}\(\[\\,z\_\{t\},\\;o\_\{t\-1\},\\;s\_\{t\}\\,\]\),\\qquad p\_\{t\}=\\mathrm\{sigmoid\}\(\\ell\_\{t\}/\\tau\)\.The binary decision is made differentiable with astraight\-throughestimator by default \(hard\{0,1\}\\\{0,1\\\}in the forward pass, soft sigmoid gradient in the backward pass:gt=𝟏​\[pt\>0\.5\]\+\(pt−detach​\(pt\)\)g\_\{t\}=\\mathbf\{1\}\[p\_\{t\}\>0\.5\]\+\(p\_\{t\}\-\\mathrm\{detach\}\(p\_\{t\}\)\)\) or, optionally, aGumbel\-sigmoidrelaxation that injects logistic noise during training and is deterministic at eval\.

#### Multiplexed state update\.

The gate selects between the write branch and the carry\-over branch:

Wt=gt⋅TTT​\(Wt−1,zt\)\+\(1−gt\)⋅Wt−1\\boxed\{W\_\{t\}\\;=\\;g\_\{t\}\\cdot\\mathrm\{TTT\}\(W\_\{t\-1\},z\_\{t\}\)\\;\+\\;\(1\-g\_\{t\}\)\\cdot W\_\{t\-1\}\}so whengt=0g\_\{t\}=0the state is carried over byte\-for\-byte and no write traffic is incurred\. The order within a step is read\-then\-gated\-write, reflecting the read/write asymmetry: every tick reads, only surprising ticks write\.

#### Writes\-per\-second budget\.

A one\-sided sparsity penalty targets a write rateρ\\rho\(defaultwrite\_target\_rho=0\.15=0\.15\), penalizing only*overshoot*of the realized soft write rate𝔼​\[pt\]\\mathbb\{E\}\[p\_\{t\}\]:

ℒwrite=\(ReLU​\(𝔼​\[pt\]−ρ\)\)2\.\\mathcal\{L\}\_\{\\text\{write\}\}=\\bigl\(\\mathrm\{ReLU\}\(\\mathbb\{E\}\[p\_\{t\}\]\-\\rho\)\\bigr\)^\{2\}\.The penalty is one\-sided so a genuinely hard task may write more if the action loss demands it; it only prevents the gate from writing every step\. Sweepingρ\\rhotraces the writes\-per\-second \(bandwidth\) axis; the gate’s selectivity is illustrated in §[6\.9](https://arxiv.org/html/2606.02775#S6.SS9)\.

### 3\.4The action\-IB training objective

The state is trained end\-to\-end against a*closed\-loop action*objective, not a generic reconstruction loss\.ActionIBHeadtreats the memory readoto\_\{t\}as parameterizing a stochastic bottleneck code and predicts the action chunk from it:

μt=to​\_​mu​\(ot\),log⁡σt2=to​\_​logvar​\(ot\),z~t=μt\+σt⊙ϵ\(ϵ∼𝒩​\(0,I\)\),A^t=ActionHead​\(z~t\),\\mu\_\{t\}=\\mathrm\{to\\\_mu\}\(o\_\{t\}\),\\quad\\log\\sigma\_\{t\}^\{2\}=\\mathrm\{to\\\_logvar\}\(o\_\{t\}\),\\quad\\tilde\{z\}\_\{t\}=\\mu\_\{t\}\+\\sigma\_\{t\}\\odot\\epsilon\\ \\ \(\\epsilon\\sim\\mathcal\{N\}\(0,I\)\),\\quad\\hat\{A\}\_\{t\}=\\mathrm\{ActionHead\}\(\\tilde\{z\}\_\{t\}\),using the reparameterization trick in training and the meanμt\\mu\_\{t\}at eval\.

The full training objective \(outer loop,total\_loss\) is:

ℒ=ℒaction\+β​ℒIB\+γeff​ℒwrite\\boxed\{\\;\\mathcal\{L\}\\;=\\;\\mathcal\{L\}\_\{\\text\{action\}\}\\;\+\\;\\beta\\,\\mathcal\{L\}\_\{\\text\{IB\}\}\\;\+\\;\\gamma\_\{\\text\{eff\}\}\\,\\mathcal\{L\}\_\{\\text\{write\}\}\\;\}with each term doing one job:

- •ℒaction\\mathcal\{L\}\_\{\\text\{action\}\}\(action utility; control\-sufficiency driver\)\.Masked cross\-entropy of the predicted action against the expert action on query/decision steps only\. This term supplies theI​\(Z;action\)I\(Z;\\text\{action\}\)“keep what matters for control” pressure, forcing the state to retain*action\-relevant*information\. This is the explicit contrast withtoken\-utility: a token\-loss twin trains the*same*gate architecture on a token/LM\-reconstruction loss \(thelearned\_token\_gatebaseline\)\.
- •β​ℒIB\\beta\\,\\mathcal\{L\}\_\{\\text\{IB\}\}\(rate / compression term\)\.Variational KL between the bottleneck posterior and a Gaussian prior,KL​\(𝒩​\(μt,σt2\)∥𝒩​\(0,σprior2\)\)\\mathrm\{KL\}\\\!\\bigl\(\\mathcal\{N\}\(\\mu\_\{t\},\\sigma\_\{t\}^\{2\}\)\\,\\\|\\,\\mathcal\{N\}\(0,\\sigma\_\{\\text\{prior\}\}^\{2\}\)\\bigr\), which upper\-boundsI​\(history;Z\)I\(\\text\{history\};Z\)\. Minimizingℒaction\+β​ℒIB\\mathcal\{L\}\_\{\\text\{action\}\}\+\\beta\\,\\mathcal\{L\}\_\{\\text\{IB\}\}realizes the control\-sufficient information bottleneck\[[55](https://arxiv.org/html/2606.02775#bib.bib55),[1](https://arxiv.org/html/2606.02775#bib.bib1)\]\. Consistent with §[4](https://arxiv.org/html/2606.02775#S4), this IB term is a*compression knob / training objective*,nota sufficiency certificate\.
- •γeff​ℒwrite\\gamma\_\{\\text\{eff\}\}\\,\\mathcal\{L\}\_\{\\text\{write\}\}\(write sparsity\)\.The one\-sided write\-rate penalty of §[3\.3](https://arxiv.org/html/2606.02775#S3.SS3), which holds the gate to the writes\-per\-second budget\.γeff\\gamma\_\{\\text\{eff\}\}is ramped0→γ0\\to\\gammaover the first 60% of training to prevent gate collapse before the gate has learned which steps are action\-relevant\.

Defaults:β=10−3\\beta=10^\{\-3\},γ=3×10−3\\gamma=3\\times 10^\{\-3\},ρ=0\.15\\rho=0\.15,σprior=1\\sigma\_\{\\text\{prior\}\}=1\. The full algorithm is summarized in Algorithm[1](https://arxiv.org/html/2606.02775#alg1)\.

Algorithm 1AURA\-Mem: Surprise\-gated fast\-weight memory update \(one step\)0:Observation encoding

ztz\_\{t\}, state

Wt−1W\_\{t\-1\}, previous read

ot−1o\_\{t\-1\}, budget

ρ\\rho
1:Read:

qt←θQ​ztq\_\{t\}\\leftarrow\\theta\_\{Q\}z\_\{t\};

ot←qt⊤​Wt−1o\_\{t\}\\leftarrow q\_\{t\}^\{\\top\}W\_\{t\-1\}
2:Surprise:

st←normalize​\(‖kt⊤​Wt−1−vt‖22\)s\_\{t\}\\leftarrow\\mathrm\{normalize\}\\\!\\bigl\(\\\|k\_\{t\}^\{\\top\}W\_\{t\-1\}\-v\_\{t\}\\\|\_\{2\}^\{2\}\\bigr\)where

kt=θK​ztk\_\{t\}=\\theta\_\{K\}z\_\{t\},

vt=θV​ztv\_\{t\}=\\theta\_\{V\}z\_\{t\}
3:Gate:

ℓt←GateMLP​\(\[zt,ot−1,st\]\)\\ell\_\{t\}\\leftarrow\\mathrm\{GateMLP\}\(\[z\_\{t\},o\_\{t\-1\},s\_\{t\}\]\);

pt←sigmoid​\(ℓt/τ\)p\_\{t\}\\leftarrow\\mathrm\{sigmoid\}\(\\ell\_\{t\}/\\tau\);

gt←𝟏​\[pt\>0\.5\]g\_\{t\}\\leftarrow\\mathbf\{1\}\[p\_\{t\}\>0\.5\]\(straight\-through in backward\)

4:Write \(conditional\):

Δt←2​kt​\(kt⊤​Wt−1−vt\)\\Delta\_\{t\}\\leftarrow 2\\,k\_\{t\}\(k\_\{t\}^\{\\top\}W\_\{t\-1\}\-v\_\{t\}\)\(closed\-form delta\-rule gradient\)

5:

Wtnew←\(1−α\)​Wt−1−η​ΔtW\_\{t\}^\{\\text\{new\}\}\\leftarrow\(1\-\\alpha\)\\,W\_\{t\-1\}\-\\eta\\,\\Delta\_\{t\}\(TTT step\)

6:

Wt←gt⋅Wtnew\+\(1−gt\)⋅Wt−1W\_\{t\}\\leftarrow g\_\{t\}\\cdot W\_\{t\}^\{\\text\{new\}\}\+\(1\-g\_\{t\}\)\\cdot W\_\{t\-1\}\(gated carry\-over\)

7:Action:

A^t←ActionHead​\(ot\)\\hat\{A\}\_\{t\}\\leftarrow\\mathrm\{ActionHead\}\(o\_\{t\}\)
7:Updated state

WtW\_\{t\}\(same shape as

Wt−1W\_\{t\-1\}; O\(1\) inference\-state VRAM\), read

oto\_\{t\}, action

A^t\\hat\{A\}\_\{t\}

### 3\.5The elastic state knob: state sizeNNas the Pareto axis

AURA\-Mem exposes a single capacity knob reported in*physical*units\. The knob is theretained\-state sizeMM, measured in bytes, governed by the bounded state dimension\(dk,dv\)\(d\_\{k\},d\_\{v\}\)\. Because the state shape is fixed \(§[3\.2](https://arxiv.org/html/2606.02775#S3.SS2)\),M=memory\_bytesM=\\texttt\{memory\\\_bytes\}is a constant independent of horizon, which is precisely why bytes \(not “% of a growing cache”\) is the honest axis\. Two coupled axes result: \(1\)state bytesMM, set by\(dk,dv\)\(d\_\{k\},d\_\{v\}\), where largerMMlifts success toward the full\-history upper bound at higher resident\-memory cost; and \(2\)writes per second, set by the write\-rate targetρ\\rho, where lower write rate cuts memory\-bandwidth at some success cost\. Throughout the experiments we holdρ\\rhofixed and sweepMM, tracing a one\-dimensional curve through the \(success, bytes, writes/sec\) surface; we do not claim a full two\-dimensional Pareto sweep\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x3.png)Figure 3:O\(1\) constant\-shape state vs\. growing KV\-cache across a long episode\.*Top:*AURA\-Mem unrolled overTTsteps: the fast\-weight tensorWWmaintains a fixed shape\[dk×dv\]\[d\_\{k\}\\times d\_\{v\}\]at every step; only the*contents*ofWWevolve, and only on gate\-selected steps \(sparse ticks, filled circles\); the resident inference\-state footprint is4,224 bytesthroughout \(formula\(dk​dv\+dv\)×batch×4\(d\_\{k\}d\_\{v\}\+d\_\{v\}\)\{\\times\}\\text\{batch\}\{\\times\}4,dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32\), confirmed constant across 100,000 steps on an NVIDIA L40S GPU\.*Bottom:*a standard attention KV\-cache unrolled over the sameTTsteps: each step appends a new row of256256bytes, growing to25,600,000 bytes\(25\.6 MB\) at step 100,000,6,061×\\timeslarger than AURA\-Mem’s state \(the KV contrast uses a local untrained stub with the same dimensionsdk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, fp32, batch=1=1; not a trained transformer\)\. Sparse writes \(4\.98–9\.19×\\timesfewer than write\-every\-step, across state budgetsN=32N\{=\}32–6464\) further reduce DRAM/HBM write traffic beyond the O\(1\) state\-size advantage\. \(O\(1\) refers to the carried inference state only; see §[3\.2](https://arxiv.org/html/2606.02775#S3.SS2)\.\)

## 4Theory: an action\-sufficiency value\-loss bound

We ground the analysis in the approximate\-information\-state \(AIS\) framework ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]\. Wedo not claim a new sufficiency theorem; the novelty of the paper is the method \(surprise\-gated TTT fast\-weight memory trained against an action\-utility objective\) and in instantiating, then empirically measuring, an*action\-sufficiency value\-loss bound*for the embodied\-VLA memory setting\. All mathematics below is standard, an instantiation ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\], and is re\-derived for completeness\.

### 4\.1Setup and the compressed memory state

The partially observed system\(St,At,Yt,Rt,γ\)\(S\_\{t\},A\_\{t\},Y\_\{t\},R\_\{t\},\\gamma\)was defined in §[3\.1](https://arxiv.org/html/2606.02775#S3.SS1)\. Thecompressed memory stateisZt=σt​\(Ht\)∈𝒵Z\_\{t\}=\\sigma\_\{t\}\(H\_\{t\}\)\\in\\mathcal\{Z\}, where\(𝒵,d\)\(\\mathcal\{Z\},d\)is a Polish metric space andσt\\sigma\_\{t\}is the learned, recurrent encoder\. In our systemZtZ\_\{t\}is the gated TTT fast\-weight state\. We attach two learned heads: areward/action headr^:𝒵×𝒜→ℝ\\hat\{r\}:\\mathcal\{Z\}\\times\\mathcal\{A\}\\to\\mathbb\{R\}and alatent\-transition headP^:𝒵×𝒜→Δ​\(𝒵\)\\hat\{P\}:\\mathcal\{Z\}\\times\\mathcal\{A\}\\to\\Delta\(\\mathcal\{Z\}\)\. We require \(and our recurrent encoder satisfies\) thatZZ*updates in a state\-like manner*:Zt\+1=ϕ^​\(Zt,Yt,At\)Z\_\{t\+1\}=\\hat\{\\phi\}\(Z\_\{t\},Y\_\{t\},A\_\{t\}\)\. This is condition \(AP2a\) ofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]: the “one fixed\-size state, updated recurrently” property that gives O\(1\) inference\-state memory\.

### 4\.2The AIS conditions \(ε\\varepsilonandδ\\delta\)

Fix a classFFof uniformly bounded measurable functions on𝒵\\mathcal\{Z\}and letdFd\_\{F\}be the associatedintegral probability metric \(IPM\)dF​\(μ,ν\):=supf∈F\|∫f​𝑑μ−∫f​𝑑ν\|d\_\{F\}\(\\mu,\\nu\):=\\sup\_\{f\\in F\}\\bigl\|\\int f\\,d\\mu\-\\int f\\,d\\nu\\bigr\|\. Total variation \(TV\) and Wasserstein\-1 are both IPMs\.

###### Definition 4\.1\(\(ε,δ\)\(\\varepsilon,\\delta\)\-AIS;Subramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49), Def\. 7\)\.

The tuple\(σ,P^,r^\)\(\\sigma,\\hat\{P\},\\hat\{r\}\)is an\(ε,δ\)\(\\varepsilon,\\delta\)\-approximate information state generatorif for every reachable history–action pair\(ht,at\)\(h\_\{t\},a\_\{t\}\), withzt:=σt​\(ht\)z\_\{t\}:=\\sigma\_\{t\}\(h\_\{t\}\):

\(AP1\): reward/action\-value prediction \(ε\\varepsiloncondition\)\.

\|𝔼\[Rt∣Ht=ht,At=at\]−r^\(zt,at\)\|≤ε\.\\bigl\|\\,\\mathbb\{E\}\[R\_\{t\}\\mid H\_\{t\}=h\_\{t\},A\_\{t\}=a\_\{t\}\]\\;\-\\;\\hat\{r\}\(z\_\{t\},a\_\{t\}\)\\,\\bigr\|\\;\\leq\\;\\varepsilon\.
\(AP2\): self\-prediction / next\-AIS prediction \(δ\\deltacondition\)\.Letμt\(⋅\):=ℙ\(Zt\+1∈⋅∣Ht=ht,At=at\)\\mu\_\{t\}\(\\cdot\):=\\mathbb\{P\}\(Z\_\{t\+1\}\\in\\cdot\\mid H\_\{t\}=h\_\{t\},A\_\{t\}=a\_\{t\}\)be the true law of the next compressed state given the full history, andνt\(⋅\):=P^\(⋅∣zt,at\)\\nu\_\{t\}\(\\cdot\):=\\hat\{P\}\(\\cdot\\mid z\_\{t\},a\_\{t\}\)the learned latent\-transition prediction\. ThendF​\(μt,νt\)≤δd\_\{F\}\\bigl\(\\mu\_\{t\},\\nu\_\{t\}\\bigr\)\\leq\\delta\.

### 4\.3Bound and proof

###### Assumption 4\.2\(Regularity\)\.

\(A1\) Rewards are bounded:Rt∈\[Rmin,Rmax\]R\_\{t\}\\in\[R\_\{\\min\},R\_\{\\max\}\]a\.s\. \(A2\)dFd\_\{F\}is an IPM\. \(A3\) The surrogate value functionV^∗\\hat\{V\}^\{\*\}has finite Minkowski functionalLV:=ρF​\(V^∗\)<∞L\_\{V\}:=\\rho\_\{F\}\(\\hat\{V\}^\{\*\}\)<\\inftyw\.r\.t\.FF\. \(A4\) Time\-homogeneity:σ,P^,r^\\sigma,\\hat\{P\},\\hat\{r\}are time\-homogeneous and \(AP1\)–\(AP2\) hold with time\-independent\(ε,δ\)\(\\varepsilon,\\delta\)\. \(A5\) Existence on the reachable set: \(AP1\)–\(AP2\) hold over the reachable/visited\(ht,at\)\(h\_\{t\},a\_\{t\}\)\.

###### Theorem 4\.3\(Action\-sufficiency value\-loss bound; instantiation ofSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49), Thm 9/27\)\.

Under Assumptions[4\.2](https://arxiv.org/html/2606.02775#S4.Thmtheorem2), let\(σ,P^,r^\)\(\\sigma,\\hat\{P\},\\hat\{r\}\)be a time\-homogeneous\(ε,δ\)\(\\varepsilon,\\delta\)\-AIS generator, letV^∗\\hat\{V\}^\{\*\}be the fixed point of the surrogate Bellman operator on\(𝒵,r^,P^,γ\)\(\\mathcal\{Z\},\\hat\{r\},\\hat\{P\},\\gamma\), and letπZ=π^∘σ\\pi\_\{Z\}=\\hat\{\\pi\}\\circ\\sigmabe the induced greedy policy withLV:=ρF​\(V^∗\)L\_\{V\}:=\\rho\_\{F\}\(\\hat\{V\}^\{\*\}\)\. Then:

\(i\) Value\-function approximation\.For all reachableht,ath\_\{t\},a\_\{t\},

\|Vt​\(ht\)−V^∗​\(σt​\(ht\)\)\|≤α,α:=ε\+γ​LV​δ1−γ\.\\bigl\|V\_\{t\}\(h\_\{t\}\)\-\\hat\{V\}^\{\*\}\(\\sigma\_\{t\}\(h\_\{t\}\)\)\\bigr\|\\;\\leq\\;\\alpha,\\qquad\\alpha:=\\frac\{\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta\}\{1\-\\gamma\}\.
\(ii\) Closed\-loop policy loss\.For all reachableht,ath\_\{t\},a\_\{t\},

‖V∗−VπZ‖∞≤2​α=2​\(ε\+γ​LV​δ\)1−γ\.\\bigl\\\|V^\{\*\}\-V^\{\\pi\_\{Z\}\}\\bigr\\\|\_\{\\infty\}\\;\\leq\\;2\\alpha\\;=\\;\\frac\{2\\,\(\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta\)\}\{1\-\\gamma\}\.

###### Proof\.

*Step 1 \(dual IPM inequality\)\.*For any boundedffandμ,ν∈Δ​\(𝒵\)\\mu,\\nu\\in\\Delta\(\\mathcal\{Z\}\), the Minkowski functional satisfies\|∫f​𝑑μ−∫f​𝑑ν\|≤ρF​\(f\)​dF​\(μ,ν\)\|\\int f\\,d\\mu\-\\int f\\,d\\nu\|\\leq\\rho\_\{F\}\(f\)\\,d\_\{F\}\(\\mu,\\nu\)\. Apply withf=V^∗f=\\hat\{V\}^\{\*\}and \(AP2\):dF​\(μt,νt\)≤δd\_\{F\}\(\\mu\_\{t\},\\nu\_\{t\}\)\\leq\\delta, giving\|𝔼\[V^∗\(Zt\+1\)∣ht,at\]−∫V^∗dνt\|≤LVδ\|\\mathbb\{E\}\[\\hat\{V\}^\{\*\}\(Z\_\{t\+1\}\)\\mid h\_\{t\},a\_\{t\}\]\-\\int\\hat\{V\}^\{\*\}\\,d\\nu\_\{t\}\|\\leq L\_\{V\}\\,\\delta\.

*Step 2 \(one\-step Bellman mismatch\)\.*At any reachable\(ht,at\)\(h\_\{t\},a\_\{t\}\), writezt=σt​\(ht\)z\_\{t\}=\\sigma\_\{t\}\(h\_\{t\}\)\. By \(AP1\) and Step 1:\|\(ℬV^∗\)\(ht,at\)−\(ℬ^V^∗\)\(zt,at\)\|≤ε\+γLVδ=:η\|\(\\mathcal\{B\}\\hat\{V\}^\{\*\}\)\(h\_\{t\},a\_\{t\}\)\-\(\\hat\{\\mathcal\{B\}\}\\hat\{V\}^\{\*\}\)\(z\_\{t\},a\_\{t\}\)\|\\leq\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta=:\\eta\.

*Step 3 \(contraction\)\.*Letα=suph\|V∗​\(h\)−V^∗​\(σ​\(h\)\)\|\\alpha=\\sup\_\{h\}\|V^\{\*\}\(h\)\-\\hat\{V\}^\{\*\}\(\\sigma\(h\)\)\|\. SinceV∗=ℬ​V∗V^\{\*\}=\\mathcal\{B\}V^\{\*\}and using Step 2 and theγ\\gamma\-contraction ofℬ\\mathcal\{B\}:α≤γ​α\+η\\alpha\\leq\\gamma\\alpha\+\\eta, soα≤η/\(1−γ\)\\alpha\\leq\\eta/\(1\-\\gamma\)\.

*Step 4 \(policy loss, factor of 2\)\.*By the standard performance\-difference/greedy argument applied toπZ\\pi\_\{Z\}\(greedy w\.r\.t\.Q^∗\\hat\{Q\}^\{\*\}\), both the overestimation and underestimation of value are bounded byα\\alpha, giving the2​α2\\alphafactor\. This matchesSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]Thm 9/27 exactly\. The full step\-by\-step proof is reproduced in Appendix[A\.1](https://arxiv.org/html/2606.02775#A1.SS1)\. ∎

### 4\.4Empirical certification

The bound’s hypotheses \(AP1, AP2\) are sup\-errors over the reachable set\. Our certification estimates related quantities by Monte Carlo on the visited distribution\. Specifically, we report:

- •ε\\varepsilon\(AP1 proxy\): the action\-prediction error of the bounded state vs\. the oracle on query steps\.
- •δ\\delta\(AP2 proxy\): the IPM distance between the policy and the EMA\-teacher next\-state/action distributions on query steps \(self\-consistency diagnostic\)\.
- •The numerically instantiatedLVL\_\{V\}\-loaded bound2​\(ε\+γ​LV​δ\)/\(1−γ\)2\(\\varepsilon\+\\gamma L\_\{V\}\\delta\)/\(1\-\\gamma\), withLVL\_\{V\}from the value head\.

Important scope\.These areempirical on\-policy diagnostics, not worst\-case bounds over all possible state sequences\. The structural form of the bound is exact \(an instantiation ofSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49)\), but it is*loose at current scale*; the coverage caveat \(Assumption A5\) applies, so the certificate does not extend to distribution shifts at deployment\. We do not claim the Monte\-Carlo readout equals the AIS premise, and we do not claim a novel theorem or a formal guarantee\.

### 4\.5What we do NOT claim

1. 1\.No MI sufficiency theorem\.We do not assert that a mutual\-information deficit implies a value\-loss bound\. The guarantee is carried by the worst\-case prediction\-error premises \(AP1, AP2\), not by mutual information\.
2. 2\.No claim of exact sufficient statistic\.We claim*approximate*sufficiency with a quantified loss that vanishes only as\(ε,δ\)→0\(\\varepsilon,\\delta\)\\to 0\.
3. 3\.No novelty of the bound\.The value\-loss bound isSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]\(Thm 9/27\); we instantiate and measure it\.
4. 4\.No off\-distribution guarantee\.\(A5\) holds only over the reachable/visited distribution\.
5. 5\.No formal guarantee at current scale\.As reported in §[6\.6](https://arxiv.org/html/2606.02775#S6.SS6)and §[7](https://arxiv.org/html/2606.02775#S7), the instantiated bound is numerically vacuous at the present experimental scale; we present it as a methodology demonstration\.

## 5Experiments

### 5\.1Tasks

All full\-scale experiments use synthetic memory\-stress tasks implemented intasks\.py\. There is no real\-world data and no pre\-training on an external corpus\.

#### noisy\_long\_recall\(primary memory benchmark\)\.

NoisyLongRecallTask: multi\-binding associative recall in a long, distractor\-heavy stream\. The policy must hold multiple simultaneous key→\\tovalue bindings; bindings can be overwritten \(latest\-write\-wins\); distractors pad the stream\. Neither accuracy nor capacity trivially saturates for feasible state budgets and training steps\. Hard config \(used for the non\-saturating sweep\):nkeys=16n\_\{\\text\{keys\}\}\{=\}16,nvals=8n\_\{\\text\{vals\}\}\{=\}8,nbindings=16n\_\{\\text\{bindings\}\}\{=\}16,nqueries=8n\_\{\\text\{queries\}\}\{=\}8,distractor\_prob=0\.5\\text\{distractor\\\_prob\}\{=\}0\.5,overwrite\_prob=0\.4\\text\{overwrite\\\_prob\}\{=\}0\.4,T=128T\{=\}128, 4,000 training steps, chance floor1/8=0\.1251/8=0\.125\.

#### sparse\_recall\(mechanism / rate\-knob illustration\)\.

SparseRecallTask: a long, highly redundant stream where only rare “event” tokens carry decision\-relevant information\. Used to illustrate the gate’s selectivity and the rate\-knob trade\-off \(§[6\.9](https://arxiv.org/html/2606.02775#S6.SS9)\)\. Parameters:nsymbols=4n\_\{\\text\{symbols\}\}\{=\}4,event\_prob=0\.10\\text\{event\\\_prob\}\{=\}0\.10,query\_frac=0\.4\\text\{query\\\_frac\}\{=\}0\.4,T=40T\{=\}40\.

Honesty note\.On easy/saturated configurations, all non\-trivial variants reach≈1\.0\\approx 1\.0accuracy\. The differentiating axis is then write bandwidth \(writes/sec\) and constant VRAM,*not*raw accuracy\. The primary claim is: AURA\-Mem matches the best O\(1\) baseline’s accuracy at 4\.98–9\.19×\\timeslower write\-rate; budget\-matched naïve gate schedules fail\.

### 5\.2Baselines and variants

All eight variants areparameter\-matched within±\\pm5%ofours\(verified byreport\_params\.py; full counts in Appendix[B\.2](https://arxiv.org/html/2606.02775#A2.SS2)\)\.

- •ours/ AURA\-Mem\[*the method*\]: surprise\-gated action\-IB fast weights\. O\(1\) inference\-state VRAM\. Learned, action\-utility surprise gate\.
- •write\_every\_step: AURA\-Mem fast weights, gate forced ON every step\. O\(1\) inference\-state VRAM, always writes\.
- •fixed\_size\_state: same fast\-weight shape asours, no gate, writes every step\. The strongest O\(1\) baseline; isolates the gate contribution\. \(Itsuses\_action\_ibconfiguration flag is dead metadata: it receives the identicalβ​ℒIB\\beta\\,\\mathcal\{L\}\_\{\\text\{IB\}\}term asours\.\)
- •full\_recurrence: a GRU with a fixed\-size hidden state \(O\(1\) inference\-state VRAM\); writes its hidden state every step\. The hidden state has constant shape \(it does*not*grow with the episode\) but, unlike AURA\-Mem, it is never write\-gated\.
- •random\_write: AURA\-Mem fast weights, random schedule at matched mean rateρ\\rho\(signal\-swap control\)\. O\(1\) inference\-state VRAM\.
- •periodic\_write: AURA\-Mem fast weights, fixed periodic schedule at matchedρ\\rho\(control\)\. O\(1\) inference\-state VRAM\.
- •learned\_token\_gate: AURA\-Mem fast weights \+ gate trained on next\-token / reconstruction loss rather than action utility \(intended token\-utility comparator\)\. O\(1\) inference\-state VRAM\.
- •no\_memory: feed\-forward only, zero state \(chance floor\)\. Never writes\.

### 5\.3Metrics

- •Success\(primary\): masked argmax accuracy on decision/query steps only\. Chance floor:1/nvals=0\.1251/n\_\{\\text\{vals\}\}\{=\}0\.125\(hard config\)\.
- •Writes/sec:𝔼​\[gt\]×control\_hz\\mathbb\{E\}\[g\_\{t\}\]\\times\\texttt\{control\\\_hz\}\(fixed 20\.0\)\.
- •Memory bytes:policy\.memory\_bytes\(batch\), constant for O\(1\) variants\.
- •ε\\varepsilon\(diagnostic\): action\-prediction error proxy\.
- •δ\\delta\(diagnostic\): IPM distance between policy and EMA\-teacher action distributions on query steps\.

### 5\.4Experimental protocol

#### Hardware\.

H100 SXM5 via Modal for accuracy/bandwidth sweeps; the O\(1\)\-VRAM measurement uses a real L40S GPU \(run20260530\-endless\-100k\)\.

#### Software\.

Python 3\.11; PyTorch 2\.3\.1; NumPy 1\.26\.4\. All cells deterministic given the same seed \(triple seed setting:random,numpy,torch\)\.

#### Seeds\.

Up to 7 seeds\{0,…,6\}\\\{0,\\ldots,6\\\}per cell; governance floor≥5\\geq 5\. Where a cell has fewer committed seeds we disclosennexplicitly\.

#### State budgets\.

The state budgetNNdenotes the memory dimensiondk=dvd\_\{k\}=d\_\{v\}; parameter count scales withNN, and at each budget the five parity variants \(AURA\-Mem,fixed\_size\_state,write\_every\_step,random\_write,periodic\_write\) are*exactly*parameter\-matched \(identical totals, not±\\pmtolerance; see Appendix[B\.2](https://arxiv.org/html/2606.02775#A2.SS2)\)\. We sweepN=dk=dv∈\{16,32,64\}N\{=\}d\_\{k\}\{=\}d\_\{v\}\\in\\\{16,32,64\\\}\(main sweep\) and\{8,16,24,32\}\\\{8,16,24,32\\\}\(hard sweep\), reporting inference state in physical bytes\.

#### Training\.

4,000 gradient steps per cell; AdamW, lr=3×10−3=3\\times 10^\{\-3\}; gradient clipmax⁡\_​norm=1\.0\\max\\\_\\text\{norm\}\{=\}1\.0; EMA teacher decay0\.950\.95\.

#### Statistical testing\.

Reported CIs are 95%tt\-intervals over seeds\. Paired bootstrap CIs with 10,000 resamples for head\-to\-head comparisons\. A gate\-attribution claim requires a CI excluding 0 \(p<0\.05p<0\.05\)\.

#### Main figures\.

Figure[4](https://arxiv.org/html/2606.02775#S5.F4)shows the bandwidth frontier; Figure[5](https://arxiv.org/html/2606.02775#S5.F5)shows hard\-task accuracy vs\. state budget; the extended 100k\-step horizon\-stress detail \(VRAM vs\. horizon, the O\(1\) measurement\) is in Appendix Figure[14](https://arxiv.org/html/2606.02775#A2.F14); Figure[6](https://arxiv.org/html/2606.02775#S5.F6)shows the accuracy\-vs\-bytes frontier\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x4.png)Figure 4:Write\-bandwidth vs\. accuracy frontier\(noisy\_long\_recall,T=96T\{=\}96,N=64N\{=\}64, 4,000 training steps; Wong colorblind\-safe palette; error bars: 95%tt\-interval\)\. Each point is one variant’s mean task success plotted against its mean write bandwidth \(writes/sec, log scale\) at the highest evaluated state budget \(N=64N\{=\}64\); lower bandwidth is preferable for DRAM/HBM wear and energy cost\. AURA\-Mem \(blue star\) achieves9\.19×\\mathbf\{9\.19\\times\}fewer writes per second than the write\-every\-step reference \(ours:2\.175±0\.5512\.175\\pm 0\.551writes/s,n=3n\{=\}3seeds; dense:20\.00020\.000writes/s\) at statistically indistinguishable task success \(Δ​acc=\+0\.0005\\Delta\\text\{acc\}\{=\}\{\+\}0\.0005\), while random\-write and periodic\-write schedules at comparable bandwidth score≈0\.366\{\\approx\}0\.366success \(vs\. ours1\.0001\.000\)\. Thelearned\_token\_gatevariant \(sky\-blue triangle\) is a collapsed comparator \(g=0g\{=\}0always, writes/sec=0\.000=0\.000, success≈0\.257\\approx 0\.257\) and should be read as a broken baseline, not a fair ablation; theN=64N\{=\}64ours result rests onn=3n\{=\}3seeds and the task is saturated at this budget \(both ours and write\-every\-step reach≈1\.000\{\\approx\}1\.000\), so bandwidth efficiency rather than an accuracy gap is the meaningful discriminant\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x5.png)Figure 5:Task success rate vs\. state budgetNNon the*hard*noisy\_long\_recallconfiguration \(nkeys=16n\_\{\\text\{keys\}\}\{=\}16,nvals=8n\_\{\\text\{vals\}\}\{=\}8,nbindings=16n\_\{\\text\{bindings\}\}\{=\}16, distractor=0\.5=0\.5, overwrite=0\.4=0\.4,T=128T\{=\}128; up to 6 seeds per cell; chance floor0\.1250\.125; shaded bands: 95%tt\-CI\)\. AURA\-Mem \(solid blue\) matchesfixed\_size\_state\(solid green\) at every tested budget \(N∈\{8,16,24,32\}N\{\\in\}\\\{8,16,24,32\\\}\): accuracy gaps areΔ∈\{−0\.016,\+0\.023,\+0\.006,\+0\.007\}\\Delta\{\\in\}\\\{\-0\.016,\\,\+0\.023,\\,\+0\.006,\\,\+0\.007\\\}, with all Welch\-ttand bootstrap 95% CIs including zero \(parity, not superiority\)\.full\_recurrence\(orange, write\-every dense GRU with fixed hidden state\) collapses to0\.250\.25–0\.380\.38success, far below parity and approaching the chance floor of0\.1250\.125at small budgets, demonstrating that dense writes do not automatically confer better task performance on the hard configuration\. TheN=16N\{=\}16AURA\-Mem point is0\.962±0\.0230\.962\\pm 0\.023\(n=6n\{=\}6healthy seeds\); a single seed\-1 collapse reproduces on rerun \(both runs≈0\.117\{\\approx\}0\.117\), a genuine reproducible bad\-seed failure that we exclude and disclose rather than silently drop\.learned\_token\_gatecollapses tog=0g\{=\}0\(≈\\approxchance\) at all budgets and is a broken comparator, not a meaningful ablation\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x6.png)Figure 6:Accuracy vs\. memory\-footprint frontier\(noisy\_long\_recall,T=96T\{=\}96,N=64N\{=\}64; Wong palette; error bars: 95%tt\-CI\)\. Each point plots a variant’s mean task success against its mean per\-step memory footprint \(bytes, log scale\); upper\-left is preferable \(high accuracy, low memory\)\. AURA\-Mem \(blue star, annotated\) achieves task success1\.000±0\.0001\.000\\pm 0\.000\(n=3n\{=\}3seeds\) at a constant state footprint of4,2244\{,\}224bytes,6,061×6\{,\}061\\timessmaller than the KV\-cache reference at 100,000 steps, while write\-every\-step andfixed\_size\_stateachieve comparable accuracy only at higher memory cost\. Random\-write and periodic\-write schedules are memory\-matched to AURA\-Mem but score≈0\.365\{\\approx\}0\.365, confirming that low bandwidth alone does not suffice; the learned action\-utility gate signal is necessary\. The write\-rate targetρ=0\.15\\rho\{=\}0\.15is held fixed: this is a one\-dimensional curve through the \(success, bytes, writes/sec\) surface, not a full two\-dimensional Pareto sweep\. TheN=64N\{=\}64ours result rests onn=3n\{=\}3seeds; memory footprints are formula\-derived constants confirmed over the 100k\-step rollout \(extended detail in Appendix Fig\.[14](https://arxiv.org/html/2606.02775#A2.F14)\)\.

## 6Results

### 6\.1Write\-bandwidth frontier \(primary claim\)

The write\-bandwidth results across all variants and state budgets are given in Table[2](https://arxiv.org/html/2606.02775#S6.T2)\(runlean\-20260530\-1449, H100,noisy\_long\_recall\)\. At state budgetN=64N\{=\}64\(dk=dv=64d\_\{k\}\{=\}d\_\{v\}\{=\}64\), AURA\-Mem achieves9\.19×\\timesfewer writes per second\(ours:2\.18±0\.552\.18\\pm 0\.55writes/s; dense write\-every\-step:20\.020\.0writes/s\) at statistically identical task success \(ours1\.000±0\.0001\.000\\pm 0\.000; dense0\.9995±0\.00150\.9995\\pm 0\.0015;Δ​acc=\+0\.0005\\Delta\\text\{acc\}\{=\}\{\+\}0\.0005, CI includes 0\)\. This is a fair, exactly parameter\-matched comparison \(parameter\-matched on total count; AURA\-Mem carries a\+41\.9%\+41\.9\\%gradient\-active asymmetry,\+6,337\+6\{,\}337params, disclosed in the parameter\-accounting discussion\): atN=64N\{=\}64both AURA\-Mem and the densefixed\_size\_state/write\_every\_stepbaselines have an identical total of 55,111 parameters \(Appendix[B\.2](https://arxiv.org/html/2606.02775#A2.SS2)\); the9\.19×9\.19\\timesis a 55,111\-parameter AURA\-Mem versus an identically\-sized 55,111\-parameter dense baseline\. We disclose that thisN=64N\{=\}64result for AURA\-Mem rests onn=3n\{=\}3seeds; theN=16N\{=\}16andN=32N\{=\}32cells provide fuller seeding \(n=6n\{=\}6andn=5n\{=\}5\) at the cost of a larger accuracy delta versus the dense reference \(Δ​acc=−0\.099\\Delta\\text\{acc\}\{=\}\{\-\}0\.099and−0\.045\-0\.045respectively\)\. Across state budgetsN=32N\{=\}32–6464the write\-reduction range is4\.98–9\.19×\\times\(7\.13×7\.13\\timesatN=16N\{=\}16,4\.98×4\.98\\timesatN=32N\{=\}32,9\.19×9\.19\\timesatN=64N\{=\}64\)\. The write\-reduction ratio is non\-monotone inNNbecause it is the ratio of two learned, budget\-dependent write rates: AURA\-Mem’s gate fires more conservatively at some budgets than others, while the dense baseline writes every step by construction\. TheN=32N\{=\}32cell additionally exhibits a wide write\-rate confidence interval across seeds, reflecting genuine seed\-to\-seed variability in the learned gate threshold at that budget rather than a systematic trend\. We therefore report the full per\-budget range \(4\.98–9\.19×\\times\) rather than a single point estimate, and anchor the conservative claim on theN=32N\{=\}32result \(4\.98×4\.98\\times,n=5n\{=\}5\)\.

Table 2:Write\-bandwidth frontier on the primary memory benchmark \(noisy\_long\_recall, main config:Nk=16N\_\{k\}\{=\}16,Nv=8N\_\{v\}\{=\}8,T=96T\{=\}96, 4 000 training steps\)\. Results shown for three state\-budget levels \(dk=dv∈\{16,32,64\}d\_\{k\}\{=\}d\_\{v\}\\in\\\{16,32,64\\\}\); 7 seeds exceptours\(n=6n\{=\}6atdk=16d\_\{k\}\{=\}16,n=5n\{=\}5atdk=32d\_\{k\}\{=\}32,n=3n\{=\}3atdk=64d\_\{k\}\{=\}64\)\.AURA\-Memmatches dense accuracy while achieving4\.98–9\.19×\\timesfewer writesper second\. Budget\-matched naive gate schedules \(random, periodic\) collapse to≈0\.366\{\\approx\}0\.366success; the learned token gate \(token\-gatebaseline\) also collapses \(gate→\\to0, see text\)\. Parity variants are*exactly*parameter\-matched at each state budget \(nparams=20,935/30,279/55,111n\_\{\\text\{params\}\}\{=\}20\{,\}935/30\{,\}279/55\{,\}111atN=16/32/64N\{=\}16/32/64; Appendix[B\.2](https://arxiv.org/html/2606.02775#A2.SS2)\)\. Writes/sec capped at control\_hz=20=20\(write\-every\-step baseline\)\. Source: run\_taglean\-20260530\-1449\.†learned\_token\_gate: gate collapsed tog=0g\{=\}0\(never writes\) atdk=16d\_\{k\}\{=\}16, producing results identical tono\_memory; high\-variance atdk=32,64d\_\{k\}\{=\}32,64\. See §[6\.8](https://arxiv.org/html/2606.02775#S6.SS8)for discussion\. 7 seeds \{0–6\} for all variants exceptours\(n=6n\{=\}6atdk=16d\_\{k\}\{=\}16;n=5n\{=\}5atdk=32d\_\{k\}\{=\}32;n=3n\{=\}3atdk=64d\_\{k\}\{=\}64\) andlearned\_token\_gate\(n=7n\{=\}7atdk=16d\_\{k\}\{=\}16;n=4n\{=\}4atdk=32d\_\{k\}\{=\}32;n=3n\{=\}3atdk=64d\_\{k\}\{=\}64\)\. 95% CI:tt\-interval \(two\-tailed,lean\_aggregate\.py\)\. H100 on Modal; 44\.7 GPU\-hours\. Although total parameters are matched per budget,AURA\-Memcarries a\+41\.9%\+41\.9\\%gradient\-active parameter asymmetry \(21,44721\{,\}447vs\.15,11015\{,\}110;\+6,337\+6\{,\}337\) from the gate/surprise pathway; see §[7](https://arxiv.org/html/2606.02775#S7)\.

#### The gain is attributable to the action\-utility gate signal, not the write budget\.

Budget\-matched naïve gate schedules fail at the same write rate:random\_writescores0\.3650\.365–0\.3680\.368success andperiodic\_writescores0\.3660\.366–0\.3750\.375\(7 seeds each\), versus AURA\-Mem’s1\.0001\.000atN=64N\{=\}64\. This is the signal\-swap control: holding the write*budget*fixed and swapping the action\-utility*signal*for a content\-blind schedule destroys the accuracy, isolating the gain to*what*the gate chooses to write rather than*how often*it writes\. Theno\_memoryfloor sits at0\.2540\.254–0\.2570\.257\(7 seeds, consistent with chance0\.250\.25\)\. The intended token\-utility comparator,learned\_token\_gate, collapsed to a degenerate state:g=0g\{=\}0at every step \(writes/sec=0\.000=0\.000\), producing results identical tono\_memoryatN=16N\{=\}16\(0\.257±0\.0120\.257\\pm 0\.012\) and high\-variance values at larger budgets \(0\.444±0\.5890\.444\\pm 0\.589atN=32N\{=\}32;0\.494±1\.0900\.494\\pm 1\.090atN=64N\{=\}64\)\. We therefore report it as a*broken comparator*, not as evidence that action\-IB beats a functional token\-loss objective; that isolated comparison is discussed in §[6\.8](https://arxiv.org/html/2606.02775#S6.SS8)and §[7](https://arxiv.org/html/2606.02775#S7)\.

#### Scope\.

The write\-bandwidth advantage is established on the bandwidth and VRAM axes only; per\-step wall\-clock latency has not been profiled in the current experiments \(§[7](https://arxiv.org/html/2606.02775#S7)\)\.

### 6\.2O\(1\) constant inference\-state VRAM \(secondary claim\)

Over a100,000\-stependless rollout on a real L40S GPU \(the dedicated horizon\-constancy stress teststress\_endless\.py, tasksparse\_recall, batch=1=1,dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32; run20260530\-endless\-100k\), the AURA\-Mem fast\-weight inference state remains flat at4,224 bytesacross all steps\. This figure is formula\-derived:\(dk​dv\+dv\)×batch×4=\(32×32\+32\)×1×4=4,224\(d\_\{k\}d\_\{v\}\+d\_\{v\}\)\\times\\text\{batch\}\\times 4=\(32\{\\times\}32\+32\)\{\\times\}1\{\\times\}4=4\{,\}224bytes, confirmed constant across all 500 logged checkpoints\. This is the batch=1=1horizon\-stress configuration, not the sweep: the sweep’s per\-budget inference state is larger \(e\.g\. 69,632 / 270,336 / 1,064,960 bytes atN=16/32/64N\{=\}16/32/64, batch=64=64\) but is likewise*constant in the horizon*TT; the O\(1\) claim concerns constancy inTT, not magnitude\. The full CUDA allocation \(torch\.cuda\.max\_memory\_allocated\) plateaus at43,051,008 byteswith zero variance over the final 80,000 steps; this is a*distinct quantity*\(total GPU peak including weights, activations, and transient buffers\) and must not be conflated with the 4,224\-byte inference\-state formula\. A local growing\-KV stub with identical dimensions \(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, fp32, batch=1=1\), computing KV growth analytically at256256bytes/step, reaches25,600,000 bytesat 100,000 steps, a6,061×\\timeslarger footprint \(25,600,000/4,224=6,060\.625\{,\}600\{,\}000/4\{,\}224=6\{,\}060\.6\)\. This long\-horizon6,061×6\{,\}061\\timesfigure is an analytic extrapolation against a matched\-dimension KV stub at 100,000 steps \(no trained model is run that far\)\. It is no longer our only KV comparison, however: the trained head\-to\-head in §[6\.3](https://arxiv.org/html/2606.02775#S6.SS3)shows that a*trained*, position\-aware transformer matches AURA\-Mem’s accuracy precisely at these byte counts, so the growing\-KV side of the contrast is now a competent baseline, not a strawman, and the separation is a property of where the bytes go \(constant vs\. linear\), not of baseline weakness\. The growth is by construction: the KV\-cache appends a row at every step, whereas the AURA\-Mem state shape is fixed at initialization\. The extended 100,000\-step measured trajectory is shown in Appendix Figure[14](https://arxiv.org/html/2606.02775#A2.F14)\. As established in §[3\.2](https://arxiv.org/html/2606.02775#S3.SS2), O\(1\) here refers to the carried inference state only; training is O\(TT\) BPTT\.

### 6\.3Trained KV\-cache head\-to\-head \(primary upgraded claim\)

The O\(1\)\-VRAM separation above is most defensible when the growing\-KV side is a*trained, competent*transformer rather than an untrained stub\. We therefore trained a position\-aware growing\-KV attention core head\-to\-head against AURA\-Mem on thesparse\_recalltask \(nsymbols=4n\_\{\\text\{symbols\}\}\{=\}4, chance0\.250\.25; event probability0\.200\.20;dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32\) across horizonsT=128T\{=\}128–10241024, withn=3n\{=\}3seeds per cell \(a small seed count, stated plainly\)\. Success is masked argmax accuracy on query steps\. The KV baseline is given*relative\-age positional encoding on its keys*, a standard transformer component: without it a content\-only attention core cannot solve “latest\-event\-wins” recall and would be an unfair strawman\. The positional information is added at attention time and does*not*change the stored\-state byte count, so the O\(1\)\-vs\-growing\-KV byte contrast is untouched\.

The two models reachaccuracy parity\(Table[3](https://arxiv.org/html/2606.02775#S6.T3)\)\. Both sit at≈1\.000\{\\approx\}1\.000across all horizons; the only AURA\-Mem points measurably below saturation areT=768T\{=\}768\(0\.9986±0\.00050\.9986\\pm 0\.0005\) andT=1024T\{=\}1024\(0\.9923±0\.00620\.9923\\pm 0\.0062, seeds\{0\.9848,0\.9919,1\.0000\}\\\{0\.9848,0\.9919,1\.0000\\\}, where one seed dipped before a longer\-training seed reached1\.00001\.0000\), and these gaps are within the small\-seed spread\. We frame the grid as parity at constant VRAM,*not*as AURA\-Mem beating the trained transformer\. The decisive difference is state size, not accuracy: AURA\-Mem’s inference state is constant \(270,336270\{,\}336bytes at the batch\-64 training configuration,4,2244\{,\}224bytes at batch 1\), independent ofTT, whereas the trained KV cache grows linearly to16\.7816\.78MB atT=1024T\{=\}1024\(batch 64\) /262,144262\{,\}144bytes \(batch 1\)\. For reference, the best O\(1\) baseline \(fixed\_size\_state\) and a densewrite\_every\_stepcontrol both score1\.00001\.0000atT=128T\{=\}128\.

Table 3:Trained KV\-cache head\-to\-head onsparse\_recall\(nsymbols=4n\_\{\\text\{symbols\}\}\{=\}4, chance0\.250\.25,dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32,n=3n\{=\}3seeds; masked argmax accuracy, mean \(std\)\)\. Both methods reach accuracy parity; only AURA\-Mem holds its inference state*constant*in the horizonTT\(O\(1\)\), while the trained KV cache grows linearly\. Memory bytes are at the batch\-64 training configuration\.VariantT=128T\{=\}128T=256T\{=\}256T=512T\{=\}512T=768T\{=\}768T=1024T\{=\}1024O\(1\)?AURA\-Mem \(ours\)1\.00001\.00000\.99990\.99990\.99980\.99980\.99860\.99860\.99230\.9923✓\(\.0000\)\(\.0000\)\(\.0002\)\(\.0002\)\(\.0003\)\(\.0003\)\(\.0005\)\(\.0005\)\(\.0062\)\(\.0062\)Trained KV \(attn\)0\.99980\.99980\.99970\.99970\.99990\.99990\.99980\.99980\.99980\.9998✗\(\.0002\)\(\.0002\)\(\.0004\)\(\.0004\)\(\.0001\)\(\.0001\)\(\.0001\)\(\.0001\)\(\.0000\)\(\.0000\)State bytes \(ours\)270,336270\{,\}336\(constant inTT\)✓State bytes \(KV\)2\.102\.10MB4\.194\.19MB8\.398\.39MB12\.5812\.58MB16\.7816\.78MB✗#### Memory separation \(deterministic, real tensor measurement\)\.

We measured the carried state of both modules directly \(memory\_bytes\(\)on the instantiated module, KV cache rolled forward toTTtokens; batch 1, fp32\)\. AURA\-Mem holds at4,224 bytes constantat everyTT, while the trained KV cache grows linearly:32,76832\{,\}768bytes atT=128T\{=\}128\(7\.76×7\.76\\timesours\),131,072131\{,\}072atT=512T\{=\}512\(31\.0×31\.0\\times\),262,144262\{,\}144atT=1024T\{=\}1024\(62\.1×62\.1\\times\),1\.281\.28MB atT=5,000T\{=\}5\{,\}000\(303×303\\times\), and2\.562\.56MB atT=10,000T\{=\}10\{,\}000\(606×606\\times\)\. The crossover, the horizon at which the KV cache first exceeds AURA\-Mem’s constant footprint, is nearT=17T\{=\}17: below it the KV cache is smaller, above it the separation grows without bound \(Figure[7](https://arxiv.org/html/2606.02775#S6.F7)\)\.

#### One mechanism, two deployment regimes \(batch\-1 vs\. batch\-NN\)\.

The batch\-1 and batch\-NNbyte counts are not two separate findings: they are the*same mechanism scaled by the batch factor*\(×64\\times 64between our batch\-1 and batch\-64 configurations\)\. What differs is the*deployment regime*\(Figure[8](https://arxiv.org/html/2606.02775#S6.F8)\)\. In datacenter LLM serving the regime is batch\-NN: many concurrent requests share the serving hardware, so a KV\-cache’s cost is amortized across the batch \(÷N\\div N\) and sessions reset between requests, so the cache never grows unbounded; there, a growing KV\-cache is the right tool\. Physical AI is the opposite regime, batch\-1: a single embodied agent runs one continuous, non\-resetting episode, so its KV\-cache grows without bound and there is no batch over which to amortize the cost\. In that regime O\(1\) carried state is required, and this is precisely where AURA\-Mem applies\. Both batch framings are honest; we state the batch explicitly wherever a byte count appears\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x7.png)Figure 7:Carried\-state growth vs\. horizon\.AURA\-Mem’s inference state is constant at4,2244\{,\}224bytes \(batch 1, fp32\) at every horizonTT, while a growing KV\-cache scales linearly withTT\. The crossover is nearT=17T\{=\}17; beyond it the separation grows without bound\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x8.png)Figure 8:One mechanism, two deployment regimes\.The same byte counts scale by the batch factor \(×64\\times 64here\); see text\. Datacenter serving \(batch\-NN\) amortizes and resets the cache; physical AI \(batch\-1\) does neither, so O\(1\) state is required\.

### 6\.4Trained closed\-loop 3\-arm panel: does the gate hurt success?

The sharpest critique of a write\-gating mechanism is closed\-loop: when the gate is allowed to suppress writes*during*control, does task success degrade? To answer this directly we ran a trained, end\-to\-end closed\-loop experiment on a real policy\.Provenance \(all real, no stubs\):we collected LIBERO\-Long base\-policy rollouts with a1010\-GPU sharded collection \(seed0\); the collection’s zero\-shot success was15/150=10\.0%15/150=10\.0\\%\(single seed\)\. We aggregated the1515successful trajectories and trained AURA\-Mem together with an always\-write KV residual corrector \(behavior\-cloning residual heads\) for3030epochs; AURA\-Mem’s training\-time write rate settled at0\.2810\.281against a targetρtrain=0\.175\\rho\_\{\\text\{train\}\}\{=\}0\.175\. We then evaluated three arms on a*held\-out*evaluation seed \(seed\_eval=999\\texttt\{seed\\\_eval\}\{=\}999\) over tasks\{0,1,2,3,5,7\}\\\{0,1,2,3,5,7\\\}withn=10n\{=\}10episodes per task \(6060episodes per arm\), a520520\-step horizon, on a singleNVIDIA A100\-40GB\(run20260601\-1509\-trainshards\)\. The three arms are:base\(no memory writes\),kv\(always\-write growing KV residual\), andaura\(surprise\-gated writes\)\. Table[4](https://arxiv.org/html/2606.02775#S6.T4)reports the result\.

Table 4:Trained closed\-loop 3\-arm panel on OpenVLA\-OFT 7B / LIBERO\-Long\(held\-outseed\_eval=999\\texttt\{seed\\\_eval\}\{=\}999, tasks\{0,1,2,3,5,7\}\\\{0,1,2,3,5,7\\\},n=60n\{=\}60episodes/arm,520520\-step horizon, A100\-40GB\)\. AURA\-Mem matches base success and slightly exceeds always\-write KV, at7\.0×7\.0\\timesfewer writes and constant memory\. Memory bytes are batch\-11inference state; the KV arm’s footprint is the cache grown over the evaluated queries\.The headline is thatthe gate does not hurt success\(Figure[9](https://arxiv.org/html/2606.02775#S6.F9)\)\. AURA\-Mem matches the base policy’s success exactly \(0\.233=0\.2330\.233=0\.233\) and slightly exceeds the always\-write KV arm \(0\.2170\.217\), while issuing7\.0×7\.0\\timesfewer memory writes than KV \(504504vs\.3,5413\{,\}541; write rate0\.1420\.142vs\.1\.0001\.000\) and holding its inference stateconstant at4,2244\{,\}224bytesversus KV’s growth to906,496906\{,\}496bytes \(214\.6×214\.6\\timessmaller at this query count\)\. Crucially, the trained gate’s*deployment*write rate \(0\.1420\.142\) fell*below*both its training target \(ρtrain=0\.175\\rho\_\{\\text\{train\}\}\{=\}0\.175\) and its training\-time value \(0\.2810\.281\) without degrading success: under closed\-loop control the gate became*more*selective than it was trained to be, yet task success held\. This is direct closed\-loop evidence for “memory that knows when to shut up\.”

We state the limits of this result conservatively\. The success differences across arms \(0\.2170\.217–0\.2330\.233\) are within small\-sample noise atn=60n\{=\}60, so the defensible claim isparity of success at a fraction of the writes and constant VRAM,*not*that AURA\-Mem improves task success; absolute success is bounded by the underlying base policy, not by the memory layer\. The low absolute success \(≈0\.23\\approx 0\.23\) reflects our zero\-shot, single\-seed evaluation regime rather than a policy or harness failure: published OpenVLA\-OFT reaches≈0\.90\\approx 0\.90–0\.980\.98on LIBERO\-Long under proper matched multi\-seed evaluation\. Within those limits, this trained closed\-loop panel directly answers the closed\-loop critique: a learned write\-gate can be inserted into a real VLA control loop and deliver constant\-memory, low\-write operation*at success parity*with both an always\-write cache and the ungated base policy\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x9.png)Figure 9:Trained closed\-loop 3\-arm panel\(OpenVLA\-OFT 7B / LIBERO\-Long; held\-outseed\_eval=999\\texttt\{seed\\\_eval\}\{=\}999, tasks\{0,1,2,3,5,7\}\\\{0,1,2,3,5,7\\\},n=60n\{=\}60episodes/arm,520520\-step horizon, NVIDIA A100\-40GB\)\.*Left:*closed\-loop task success per arm—base14/60=0\.23314/60\{=\}0\.233,kv13/60=0\.21713/60\{=\}0\.217,aura14/60=0\.23314/60\{=\}0\.233\(nncounts annotated\)\. AURA\-Memmatches the ungated base policy’s success exactlyand slightly exceeds the always\-write KV arm\.*Right:*memory write rate—base0\.0000\.000,kv1\.0001\.000,aura0\.1420\.142\(504504vs\.3,5413\{,\}541writes, the annotated7\.0×\\mathbf\{7\.0\\times\}fewer\)—at a constant4,2244\{,\}224\-byte inference state versus KV’s growth to906,496906\{,\}496bytes\. The success spread across arms \(0\.2170\.217–0\.2330\.233\) is within small\-sample noise atn=60n\{=\}60, so the defensible reading issuccess parity at a fraction of the writes and constant VRAM, not a success improvement; absolute success is bounded by the underlying zero\-shot base policy, not by the memory layer\.
### 6\.5Real\-robot panel: OpenVLA\-OFT 7B on LIBERO\-Long

To show that the AURA\-Mem mechanism and the AIS measurement run on a*real*vision\- language\-action policy rather than a synthetic stub, we ran a closed\-loop panel onOpenVLA\-OFT 7Bover LIBERO\-Long\. The policy loaded and acted in real time on a singleNVIDIA A100\-40GB\(vla\_loaded=\{=\}True; peak VRAM16\.0816\.08GB; mean latency0\.1380\.138s/step\) over the official512512\-step LIBERO\-Long horizon, on55tasks×\\times33episodes\. This panel and the trained closed\-loop 3\-arm panel of §[6\.4](https://arxiv.org/html/2606.02775#S6.SS4)share the same A100\-40GB harness; this one establishes that the mechanism and AIS measurement run on the real policy, while the former tests the gate’s effect on closed\-loop success\. The overall closed\-loop success rate is0\.200\.20\(3/153/15episodes\): tasks0,11,22each succeeded once \(0\.330\.33\), and tasks33and44scored0\.000\.00\. We report thishonestly as a zero\-shot proof\-of\-mechanism panel, not a state\-of\-the\-art sweep, and we do*not*claim AURA\-Mem improves robot success: AURA\-Mem is a memory/measurement layer, and the success figures here are the underlying policy’s\. As noted in §[6\.4](https://arxiv.org/html/2606.02775#S6.SS4), our low absolute success \(≈0\.20\\approx 0\.20–0\.230\.23\) reflects the zero\-shot, single\-seed evaluation regime—not a policy or harness failure—against the≈0\.90\\approx 0\.90–0\.980\.98published OpenVLA\-OFT calibration\.

On the*real*policy hidden\-state stream, we measured the\(ε,δ\)\(\\varepsilon,\\delta\)action\-information\-state premises by hooking the4,0964\{,\}096\-dim last\-layer hidden states \(language\_model\.model\.normforward hook, sequence\-mean\-pooled\),890890transition tuples\. The measured premises areεmean=0\.0132\\varepsilon\_\{\\text\{mean\}\}\{=\}0\.0132,εq​90=0\.0259\\varepsilon\_\{q90\}\{=\}0\.0259, andδW1=0\.0074\\delta\_\{W\_\{1\}\}\{=\}0\.0074\. As in the synthetic setting \(§[6\.6](https://arxiv.org/html/2606.02775#S6.SS6)\), the instantiated value\-loss bound remainsvacuous at this scale, so we present it as a methodology demonstration of the AIS measurement on a real VLA stream, not a formal guarantee\. Finally, AURA\-Mem’s O\(1\) state holds on this real stream at4,224 bytes constant, confirming the constant\-VRAM property transfers from the synthetic benchmarks to a real 7B policy\.

### 6\.6Action\-sufficiency certificate

We instantiate and measure the bound of §[4](https://arxiv.org/html/2606.02775#S4)on the real shipped checkpoint \(20260531\-0220\-ours\-s0;noisy\_long\_recall, 4,000 steps, H100, seed 0,nparams=55,111n\_\{\\text\{params\}\}\{=\}55\{,\}111, inference\-state16,64016\{,\}640bytes atdk=dv=64d\_\{k\}\{=\}d\_\{v\}\{=\}64\)\. The measured AIS premises are strong on the action\-prediction axis:εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}\{=\}0\.0021\(95% CI\[0\.0020,0\.0023\]\[0\.0020,0\.0023\]\),εq​95=0\.0076\\varepsilon\_\{q95\}\{=\}0\.0076\(\[0\.0067,0\.0083\]\[0\.0067,0\.0083\]\), with self\-prediction distanceδTV=0\.5838\\delta\_\{\\text\{TV\}\}\{=\}0\.5838\(\[0\.5803,0\.5872\]\[0\.5803,0\.5872\]\) andδW1=0\.081\\delta\_\{W\_\{1\}\}\{=\}0\.081\. The measured one\-step value\-prediction residual isΔmean∗=0\.661\\Delta^\{\*\}\_\{\\text\{mean\}\}\{=\}0\.661\(\[0\.647,0\.676\]\[0\.647,0\.676\]\) andΔq​95∗=3\.854\\Delta^\{\*\}\_\{q95\}\{=\}3\.854\(\[3\.634,4\.050\]\[3\.634,4\.050\]\)\.

All instantiated value\-loss bounds are vacuous at this scale\.The conservativeLVL\_\{V\}\-loaded form \(guaranteed\) evaluates to52\.6952\.69, and even the tightΔ∗\\Delta^\{\*\}form \(guaranteed\) evaluates to69\.5369\.53; both far exceed the trivial value span of10\.010\.0that the bounded\-reward assumption alone provides\. Using empirical \(rather than worst\-case\) constants gives estimated readouts of1\.701\.70\(loose form, with empiricalLV=0\.158L\_\{V\}\{=\}0\.158\) and11\.9311\.93\(tight form\); these are*informative diagnostics, not guarantees*\. The headline takeaway is that action\-prediction sufficiencyε\\varepsilonis small while the*value\-loss bound*is loose; we present the certificate as a methodology demonstration \(instantiatingSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49)\), not as a formal guarantee\. Theseε,δ,Δ∗\\varepsilon,\\delta,\\Delta^\{\*\}readouts are empirical on\-policy diagnostics; distribution shift at deployment is not covered\.

### 6\.7Hard\-task results

To recover a non\-saturated accuracy regime we ran the hardnoisy\_long\_recallconfiguration \(nkeys=16n\_\{\\text\{keys\}\}\{=\}16,nvals=8n\_\{\\text\{vals\}\}\{=\}8,nbindings=16n\_\{\\text\{bindings\}\}\{=\}16,nqueries=8n\_\{\\text\{queries\}\}\{=\}8, distractor=0\.5=0\.5, overwrite=0\.4=0\.4,T=128T\{=\}128, chance floor0\.1250\.125; runlean\-hard\-20260530\-2036, 160/160 cells complete\)\. AURA\-Mem achieves accuracy at or near parity with the strongest O\(1\) baselinefixed\_size\_stateat every budget:N=8N\{=\}8ours0\.8670\.867at6\.13×6\.13\\timesfewer writes;N=16N\{=\}16ours0\.962±0\.0230\.962\\pm 0\.023\(n=6n\{=\}6healthy seeds,Δ​acc=\+0\.0234\\Delta\\text\{acc\}\{=\}\{\+\}0\.0234versus the dense reference, write\-ratio5\.19×5\.19\\times\);N=24N\{=\}24ours0\.9890\.989at5\.36×5\.36\\times; andN=32N\{=\}32ours0\.9970\.997at5\.95×5\.95\\times\. TheN=16N\{=\}16seed\-1 collapse*reproduces on rerun*\(the rerun likewise collapsed to0\.1170\.117\): this is a genuine, reproducible bad\-seed failure of the gate at this budget, not a transient or measurement artifact\. We exclude that seed and report then=6n\{=\}6healthy seeds above; the excluded seed is disclosed rather than silently dropped\. The parity gaps versusfixed\_size\_stateall have Welch\-ttand bootstrap 95% CIs that include zero: AURA\-Mem is at*parity*, not superior, in accuracy, while writing5\.195\.19–6\.13×6\.13\\timesless\. Thefull\_recurrencebaseline \(write\-every dense GRU with fixed hidden state\)collapses to≈0\.25\\approx 0\.25, near the chance floor, on this configuration, demonstrating that dense writing does not by itself solve the harder task\. Figure[5](https://arxiv.org/html/2606.02775#S5.F5)plots the full budget sweep\.

### 6\.8Ablations and gate mechanism

#### Variant ablation\.

Figure[10](https://arxiv.org/html/2606.02775#S6.F10)compares all variants atN=64N\{=\}64on the main task\. The forced\-write twinswrite\_every\_step\(0\.99950\.9995,20\.020\.0writes/s\) andfixed\_size\_state\(0\.99960\.9996,20\.020\.0writes/s\) confirm that the fast\-weight substrate alone reaches ceiling at this budget; AURA\-Mem matches them \(1\.0001\.000\) at2\.182\.18writes/s \(the9\.19×9\.19\\timesefficiency\)\. Content\-blind schedules \(random\_write0\.3650\.365at2\.982\.98writes/s;periodic\_write0\.3740\.374at2\.922\.92writes/s\) and the collapsedlearned\_token\_gate\(0\.4940\.494,n=3n\{=\}3, CI±1\.090\\pm 1\.090; writes/sec1\.000±4\.3011\.000\\pm 4\.301: high variance, broken gate\) fall far below, andno\_memorysits at the0\.2540\.254floor\. All five variants in this matched\-budget comparison are trained with the*identical*action\-information\-bottleneck objective \(β​LIB\\beta L\_\{\\text\{IB\}\},β=10−3\\beta\{=\}10^\{\-3\}\); only the gate signal / write schedule differs, so the IB term is held constant and this ablation isolates the*gate signal*, not the IB objective, whose separate contribution we measure in the dedicatedβ=0\\beta\{=\}0ablation below\.

#### Information\-bottleneck ablation\.

We ran an isolatedβ=0\\beta\{=\}0ablation on the hard task \(runlean\-hard\-ibabl\-20260530\-2125,N=8N\{=\}8\):ours\_ib\(β\>0\\beta\{\>\}0\) scores0\.867±0\.0400\.867\\pm 0\.040versusours\_noib\(β=0\\beta\{=\}0\) at0\.692±0\.2760\.692\\pm 0\.276, a gap of\+0\.175\+0\.175\. The Welch CI is\[−0\.100,\+0\.450\]\[\-0\.100,\+0\.450\]\(p=0\.153p\{=\}0\.153\) and the bootstrap CI is\[\+0\.014,\+0\.368\]\[\+0\.014,\+0\.368\]\. We read this asborderline positive: the IB term confers a training\-stability benefit \(lower variance, higher mean\), but its write\-rate reduction is not statistically significant at this sample size\. We do not claim a decisive IB isolation\. Figure[11](https://arxiv.org/html/2606.02775#S6.F11)shows the comparison\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x10.png)Figure 10:Variant ablation atN=64N\{=\}64\(noisy\_long\_recall, runlean\-20260530\-1449; error bars: 95%tt\-CI\)\. Each ablated gate signal is compared at matched state size\. The forced\-write twins \(write\_every\_step,fixed\_size\_state\) and AURA\-Mem all reach≈1\.000\{\\approx\}1\.000success, but AURA\-Mem does so at2\.182\.18writes/s vs\.20\.020\.0\(9\.19×9\.19\\timesfewer\)\. Content\-blind schedules \(random/periodic\) collapse to≈0\.37\{\\approx\}0\.37at matched bandwidth, andlearned\_token\_gateis a broken comparator \(g→0g\{\\to\}0, high variance\)\. The gate*signal*, not the write*budget*, drives the result\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x11.png)Figure 11:Information\-bottleneck ablation\(hardnoisy\_long\_recall,N=8N\{=\}8, runlean\-hard\-ibabl\-20260530\-2125\)\.ours\_ib\(β\>0\\beta\{\>\}0,0\.867±0\.0400\.867\\pm 0\.040\) vs\.ours\_noib\(β=0\\beta\{=\}0,0\.692±0\.2760\.692\\pm 0\.276\); gap\+0\.175\+0\.175, Welchp=0\.153p\{=\}0\.153\(CI\[−0\.100,\+0\.450\]\[\-0\.100,\+0\.450\]\), bootstrap CI\[\+0\.014,\+0\.368\]\[\+0\.014,\+0\.368\]\. Borderline positive: a training\-stability benefit, but the write\-rate effect is not significant at this sample size\.

### 6\.9Gate\-mechanism illustration \(single seed\)

To address whether the action\-error gate behaves sensibly on a sequential control\-style stream, we provide a small mechanism illustration onSparseRecallTask\(T=40T\{=\}40,nsymbols=4n\_\{\\text\{symbols\}\}\{=\}4, chance0\.250\.25; 512 evaluation episodes; single trained seed\)\. This is a*mechanism illustration on one synthetic stream with a single training seed, not a robotics benchmark\.*

#### Gate selectivity\.

Splitting timesteps by category, the gate fires atpsoft=0\.829±0\.211p\_\{\\text\{soft\}\}\{=\}0\.829\\pm 0\.211on*event*\(salient, decision\-relevant\) steps versus0\.318±0\.2480\.318\\pm 0\.248on*distractor*\(filler\) steps, a2\.61×\\timesselectivity ratio \(absolute gap\+0\.511\+0\.511\), and at0\.236±0\.2450\.236\\pm 0\.245on query steps where no new information arrives\. The trained policy reaches0\.9820\.982accuracy while writing only≈24%\{\\approx\}24\\%of steps on average, consistent with the≈10%\{\\approx\}10\\%event rate\. Figure[12](https://arxiv.org/html/2606.02775#S6.F12)shows the per\-step trace and the aggregate by category\.

#### Rate knob\.

Sweeping the write targetρ∈\{0\.05,0\.20,0\.50,0\.85\}\\rho\\in\\\{0\.05,0\.20,0\.50,0\.85\\\}\(seed 3,T=40T\{=\}40\) traces a monotone trade\-off with a sharp threshold near the task’s information density:ρ=0\.05\\rho\{=\}0\.05collapses the gate \(realized write rate0\.0230\.023, accuracy0\.4200\.420, approaching chance\);ρ=0\.20\\rho\{=\}0\.20enters the correct regime \(write0\.3830\.383, accuracy0\.9880\.988\); andρ=0\.50\\rho\{=\}0\.50–0\.850\.85saturate \(write0\.4670\.467–0\.5070\.507, accuracy0\.9790\.979–0\.9810\.981\), because the≈10%\{\\approx\}10\\%event information is already captured\. Figure[13](https://arxiv.org/html/2606.02775#S6.F13)plots the trade\-off\. These are single\-seed results on a synthetic stream and should not be extrapolated quantitatively to real VLA deployments\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x12.png)Figure 12:Action\-error gate selectivity on a sequential control stream\(SparseRecallTask,T=40T\{=\}40,nsymbols=4n\_\{\\text\{symbols\}\}\{=\}4, chance0\.250\.25; 512 evaluation episodes; single trained seed; error bars: standard error over episodes\)\.*Left:*a single episode’s per\-step soft gate probabilitypsoftp\_\{\\text\{soft\}\}\(blue\) overlaid on event steps \(orange shading,≈10%\{\\approx\}10\\%of steps\) and distractor steps \(grey shading\)\.*Right:*meanpsoftp\_\{\\text\{soft\}\}by step category: the gate fires at0\.829±0\.2110\.829\\pm 0\.211on event steps versus0\.318±0\.2480\.318\\pm 0\.248on distractor steps \(2\.61×\\timesselectivity,Δ=\+0\.511\\Delta\{=\}\{\+\}0\.511\), and0\.236±0\.2450\.236\\pm 0\.245on query steps\. The policy reaches0\.9820\.982accuracy writing≈24%\{\\approx\}24\\%of steps\. Mechanism illustration on one synthetic stream, single seed; not a robotics benchmark\.![Refer to caption](https://arxiv.org/html/2606.02775v1/x13.png)Figure 13:Write\-rate vs\. accuracy trade\-offunder the rate\-knob sweep \(SparseRecallTask,T=40T\{=\}40;ρ∈\{0\.05,0\.20,0\.50,0\.85\}\\rho\{\\in\}\\\{0\.05,0\.20,0\.50,0\.85\\\}; single seed \(seed 3\); 350 training steps per run;xx: measured write rate;yy: accuracy; points labeled byρ\\rho\)\. Below the task’s event density \(≈10%\{\\approx\}10\\%\), the gate collapses \(ρ=0\.05→\\rho\{=\}0\.05\\towrite0\.0230\.023, accuracy0\.4200\.420\)\. Atρ=0\.20\\rho\{=\}0\.20the gate enters the correct regime \(write≈0\.38\{\\approx\}0\.38, accuracy0\.9880\.988\); further increasingρ\\rhosaturates \(write0\.4670\.467–0\.5070\.507, accuracy0\.9790\.979–0\.9810\.981\)\. A tunable bandwidth knob with a sharp threshold near the task’s information density; single\-seed synthetic result\.

## 7Limitations and honest disclosures

We report the following limitations without mitigation spin\. Each maps directly to a scope boundary in the claims ledger and to a specific experimental or theoretical finding\.

#### 1\. O\(1\)\-VRAM applies to inference state only; training is O\(TT\) BPTT\.

The O\(1\) memory claim refers exclusively to the*inference\-time state footprint*of the recurrent fast\-weight cell\. The state is a single matrix–vector pair of fixed dimensiondk×dv\+dvd\_\{k\}\\times d\_\{v\}\+d\_\{v\}; at the sweep configuration \(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, batch=1=1, fp32\) this is exactly4,224 bytes, computed analytically as\(dk⋅dv\+dv\)×batch×4\(d\_\{k\}\\cdot d\_\{v\}\+d\_\{v\}\)\\times\\text\{batch\}\\times 4\. This quantity is constant over 100,000 inference steps \(run20260530\-endless\-100k, NVIDIA L40S\)\. It is*not*torch\.cuda\.max\_memory\_allocated\(\): the CUDA allocator peak, which includes model weights, activations, and all bookkeeping, measured43,051,008 bytes\(≈43\.1\{\\approx\}43\.1MB\) and also plateaus \(zero variance over the final 80,000 steps\); these are distinct quantities that must not be conflated\. During*training*, AURA\-Mem uses standard backpropagation through time \(BPTT\), which retains intermediate activations for the full unroll lengthTT; training memory therefore scales as O\(TT\), identically to any recurrent network\. The O\(1\) advantage does not apply to training VRAM\.

#### 2\. The accuracy claim is parity with the best O\(1\) baseline, not superiority\.

AURA\-Mem does*not*achieve higher task accuracy thanfixed\_size\_state, the strongest O\(1\) recurrent baseline\. The primary contribution is*write\-bandwidth efficiency at matched accuracy*: 4\.98–9\.19×\\timesfewer memory writes per second while maintaining accuracy within confidence intervals offixed\_size\_stateon both the main task \(T=96T\{=\}96\) and the hard task \(T=128T\{=\}128, 160/160 cells, up to 6 seeds\)\. On the main task, accuracy deltas relative to the dense write reference areΔN16=−0\.099\\Delta\_\{\\text\{N16\}\}\{=\}\{\-\}0\.099,ΔN32=−0\.045\\Delta\_\{\\text\{N32\}\}\{=\}\{\-\}0\.045,ΔN64=\+0\.0005\\Delta\_\{\\text\{N64\}\}\{=\}\{\+\}0\.0005\. On the hard task, parity gaps versusfixed\_size\_stateare−0\.016\-0\.016,\+0\.023\+0\.023,\+0\.006\+0\.006,\+0\.007\+0\.007; all Welchtt\-test and bootstrap 95% CIs include zero\. Any framing of this work as an accuracy improvement over the best O\(1\) baseline would be unsupported by the data\.

#### 3\. The 9\.19×\\timesheadline operates on a near\-saturated task\.

The largest write\-bandwidth ratio, 9\.19×\\timesatN=64N\{=\}64, is measured where AURA\-Mem achieves success1\.000±0\.0001\.000\\pm 0\.000and the dense baseline achieves0\.9995±0\.00150\.9995\\pm 0\.0015: the accuracy gap is0\.00050\.0005, smaller than one standard deviation\. At saturation the bandwidth frontier is the only axis of differentiation \(the correct and honest framing\), but a reviewer checking “what is the accuracy cost?” will correctly note that ceiling performance removes information about accuracy robustness\. The hard task \(T=128T\{=\}128, chance floor0\.1250\.125\) was introduced specifically to recover a non\-saturated regime; therefull\_recurrencecollapses to≈0\.25\{\\approx\}0\.25, and AURA\-Mem achieves5\.195\.19–6\.13×6\.13\\timesfewer writes at near\-parity accuracy withfixed\_size\_state\. TheN=64N\{=\}64headline ratio should be interpreted alongside the hard\-task results, not in isolation\.

#### 4\. Gradient\-active parameter asymmetry: AURA\-Mem has\+41\.9%\+41\.9\\%more gradient\-active parameters than the scheduled\-write comparators\.

At each budget the parity variants share anidenticaltotal parameter count \(e\.g\. 20,935 / 30,279 / 55,111 atN=16/32/64N\{=\}16/32/64; exact match, not a tolerance band, verified byreport\_params\.py\)\. However, thegate\_mlp\(6,337 parameters at theN=32N\{=\}32reference\) is gradient\-active*only in AURA\-Mem*; inwrite\_every\_step,fixed\_size\_state,random\_write, andperiodic\_writeit is bypassed and receives no gradient\. As a result AURA\-Mem has21,447 gradient\-active parametersversus15,110forwrite\_every\_step, a difference of\+\+6,337\(\+41\.9%\+41\.9\\%; figures at theN=32N\{=\}32reference configuration\)\. In addition, theGatedTTTState\.predictorMLP \(8,320 parameters\) is a dead module: a backward\-pass audit confirms its gradient isNonefor every variant, including AURA\-Mem; it is never invoked in any forward path and inflates all nominal counts by 8,320\. The framing “AURA\-Mem==write\-every\-step minus the gate” is architecturally accurate but*understates*the effective capacity advantage given to AURA\-Mem\. A conclusive capacity\-controlled ablation would require a variant that allocatesgate\_mlpbut holds its parameters frozen, which we have not run\. We disclose this so readers can assess whether the observed frontier reflects the gating mechanism, the added gate\-module capacity, or both\.

#### 5\. The AIS certificate bound is currently vacuous at this scale; we report it as a methodology demonstration only\.

Measured on the real shipped checkpoint \(§[6\.6](https://arxiv.org/html/2606.02775#S6.SS6)\), the AIS value\-loss bound \(instantiation ofSubramanian et al\.[49](https://arxiv.org/html/2606.02775#bib.bib49), Thm 9/27\) is numerically vacuous: the conservativeLVL\_\{V\}\-loaded form evaluates to a guaranteed52\.6952\.69and the tightΔ∗\\Delta^\{\*\}form to a guaranteed69\.5369\.53, both*exceeding*the trivial value span10\.010\.0\. A bound that exceeds the trivial span is valid but*vacuous*: it adds no information beyond the bounded\-reward argument\. We report this transparently\. The measured premises are nonetheless strong on the action\-prediction axis \(εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}\{=\}0\.0021, 95% CI\[0\.0020,0\.0023\]\[0\.0020,0\.0023\];εq​95=0\.0076\\varepsilon\_\{q95\}\{=\}0\.0076\), withδTV=0\.5838\\delta\_\{\\text\{TV\}\}\{=\}0\.5838and one\-step value\-residualΔmean∗=0\.661\\Delta^\{\*\}\_\{\\text\{mean\}\}\{=\}0\.661\. Using empirical rather than worst\-case constants gives informative \(non\-guaranteed\) readouts of1\.701\.70\(loose form, empiricalLV=0\.158L\_\{V\}\{=\}0\.158\) and11\.9311\.93\(tight form\)\. These are*empirical on\-policy diagnostics*of how closely AURA\-Mem’s learned transition head tracks actual next\-state distributions; we do*not*claim a “formal guarantee” of value\-loss quality\. The AIS section of this paper constitutes a methodology demonstration, not a tight numerical guarantee\.

#### 6\. The information\-bottleneck contribution is borderline positive and not decisively isolated\.

The intended token\-utility comparator,learned\_token\_gate, collapsed in all runs \(g=0\.000g\{=\}0\.000at every step, writes/sec=0\.000=0\.000\), reducing tono\_memorybehaviour; it therefore establishes only that a surprise gate outperforms a broken comparator, not that the action\-IB objective outperforms a*functional*token\-prediction objective\. The isolatedβ=0\\beta\{=\}0ablation \(ours\_noib, runlean\-hard\-ibabl\-20260530\-2125,N=8N\{=\}8\) givesours\_ib0\.867±0\.0400\.867\\pm 0\.040versusours\_noib0\.692±0\.2760\.692\\pm 0\.276, a gap of\+0\.175\+0\.175\(Welchp=0\.153p\{=\}0\.153, CI\[−0\.100,\+0\.450\]\[\-0\.100,\+0\.450\]; bootstrap CI\[\+0\.014,\+0\.368\]\[\+0\.014,\+0\.368\]\)\. This is borderline positive: the IB term confers a training\-stability benefit, but its write\-rate reduction is not statistically significant at this sample size\. We restrict the claim accordingly: a learned surprise gate \(≫\\ggrandom/periodic schedules by\+0\.535\+0\.535success atN=16N\{=\}16, 7 seeds\)*together with*the action\-IB loss produce the reported frontier; the independent contribution of the IB term is suggestive but not decisively isolated\.

#### 7\. The shipped checkpoint and the sweep configuration use different hyperparameters\.

All experimental results in this paper \(write\-bandwidth ratios, accuracy, the 4,224\-byte state formula, the 6,061×\\timesKV ratio, parameter counts\) use the*sweep configuration*:dmodel=64d\_\{\\text\{model\}\}\{=\}64,dk=dv=Nd\_\{k\}\{=\}d\_\{v\}\{=\}NwithN∈\{16,32,64\}N\{\\in\}\\\{16,32,64\\\}\(30,279 total parameters at theN=32N\{=\}32reference, 21,447 gradient\-active\)\. The publicly released HuggingFace checkpoint \(Kaikaku/aura, currently private\) usesdk=dv=64d\_\{k\}\{=\}d\_\{v\}\{=\}64, totalling 55,111 parameters; at this configuration the inference state is\(64×64\+64\)×1×4=16,640\(64\{\\times\}64\+64\)\{\\times\}1\{\\times\}4=16\{,\}640bytes and the AIS certificate of §[6\.6](https://arxiv.org/html/2606.02775#S6.SS6)was measured\. These numbers differ from the sweep figures and must not be cross\-cited; the shipped checkpoint is described in the model card \(Appendix[C](https://arxiv.org/html/2606.02775#A3)\)\.

#### 8\. The KV\-cache contrast uses an untrained local stub, not a trained transformer\.

The6,061×6\{,\}061\\timesstate\-size ratio is derived from an analytic comparison against a local stub \(GrowingKVCache, matched todk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, batch=1=1, fp32\), not against a production trained transformer\. The stub is untrained; it serves as a reference for the memory\-growth formula only\. We make no claim about the task performance of a KV\-attention model at matched compute; the comparison establishes only the*structural*memory\-growth asymptote\. A fair task\-accuracy comparison against a trained transformer with KV\-cache eviction \(e\.g\., H2O, Ada\-KV, SnapKV\) would require running those systems closed\-loop at the same horizon, which we have not done; they appear in this paper as contextual references only\.

#### 9\. All results are on synthetic recall benchmarks; no real\-robot, energy, wall\-clock, or LIBERO multi\-baseline claims\.

Every quantitative result \(write\-bandwidth ratios, accuracy, the O\(1\)\-VRAM demonstration, parameter counts, AIS measurements\) comes from syntheticnoisy\_long\_recall\(main taskT=96T\{=\}96; hard taskT=128T\{=\}128\) andsparse\_recallbenchmarks run in simulation on H100/L40S GPUs via Modal\. We have not deployed AURA\-Mem on physical robot hardware; dynamics noise, sensor artifacts, actuation delays, contact physics, and sim\-to\-real shift are not captured\. We make no claims about robot energy consumption or joule costs; we measure*write counts*, not energy\. Per\-step wall\-clock latency has not been profiled; the O\(1\) advantage on the memory and write\-bandwidth axes is structural and holds from the first step \(the state shape is fixed, so its footprint never grows\), but a latency crossover comparison requires hardware profiling not yet conducted\. The VLA mechanism panel \(§[6\.9](https://arxiv.org/html/2606.02775#S6.SS9)\) is a single\-seed illustration, not a robotics benchmark, and OpenVLA\-OFT/LIBERO are referenced for motivation only; a multi\-baseline retrained comparison on a 7B VLA run closed\-loop on physical hardware remains future work\. Pending items includeN=96N\{=\}96cells and additional hard\-sweep seeds\.

## 8Conclusion

We presented AURA\-Mem, a surprise\-gated, action\-sufficient fast\-weight memory for O\(1\) inference\-state\-VRAM robot policies\. The mechanism is one bounded state object, one learned action\-error write gate, and one closed\-loop action\-IB objective\. Our results establish three honest, independently falsifiable contributions\. First, awrite\-bandwidth frontier: across state budgetsN=32N\{=\}32–6464on thenoisy\_long\_recalltask, AURA\-Mem achieves4\.98–9\.19×\\timesfewer writes per second\(4\.98×4\.98\\timesatN=32N\{=\}32withn=5n\{=\}5seeds, up to9\.19×9\.19\\timesatN=64N\{=\}64withn=3n\{=\}3seeds\) at accuracy that is statistically equivalent to the dense write\-every\-step baseline, with budget\-matched random and periodic schedules failing at the same write rate, establishing that the gain comes from the*action\-utility gate signal*, not the write budget\. Second,measured O\(1\) constant inference\-state VRAM: 4,224 bytes formula\-derived and confirmed flat across 100,000 steps on a real L40S GPU, versus a6,061×6\{,\}061\\times\-larger growing\-KV reference\. Third, anempirical instantiation of the AIS action\-sufficiency value\-loss boundofSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\], with small measured action\-prediction error \(εmean=0\.0021\\varepsilon\_\{\\text\{mean\}\}\{=\}0\.0021\) but a value\-loss bound that is*vacuous*at current scale, reported transparently as a methodology demonstration, not a formal guarantee\.

We are deliberate about what we do*not*show\. The accuracy result isparitywith the best O\(1\) baseline \(fixed\_size\_state\), not superiority: on the non\-saturating hard task \(T=128T\{=\}128, 160/160 cells\), parity gaps have CIs including zero while AURA\-Mem writes5\.195\.19–6\.13×6\.13\\timesless, and a write\-every recurrence collapses to≈0\.25\{\\approx\}0\.25\. All evaluation is on synthetic memory benchmarks; we have no real\-robot deployment, no energy measurements, and no wall\-clock latency profile\. The IB term’s independent contribution is borderline positive but not decisively isolated, and the headline gate comparator \(learned\_token\_gate\) collapsed\.

Future work follows directly from these boundaries: deployment on physical robot hardware and a multi\-baseline closed\-loop comparison against trained KV\-eviction systems on a 7B VLA backbone; profiling the wall\-clock latency crossover on edge accelerators; measuring the tighterΔ∗\\Delta^\{\*\}certificate at a scale where the value\-loss bound becomes non\-vacuous; and a capacity\-controlled ablation \(frozen gate\-MLP weights\) to isolate the gating mechanism from its added parameters\. The central thesis, that a robot should*write only what it would act on*, is, we believe, the right organizing principle for memory on bandwidth\- and endurance\-constrained embodied hardware\.

## References

- Alemi et al\. \[2017\]A\. A\. Alemi, I\. Fischer, J\. V\. Dillon, and K\. Murphy\.Deep variational information bottleneck\.In*International Conference on Learning Representations \(ICLR\)*, 2017\.
- Anonymous \[2026\]Anonymous\.CSR: Cache\-state reuse for infinite\-horizon robot policies\.*arXiv preprint arXiv:2605\.07325*, 2026\.URL[https://arxiv\.org/abs/2605\.07325](https://arxiv.org/abs/2605.07325)\.KV\-cache reuse via prefix stability; asymptotically growing cache\.
- Arora et al\. \[2024\]S\. Arora, S\. Eyuboglu, M\. Zhang, A\. Timalsina, S\. Alberti, D\. Zinsley, J\. Zou, A\. Rudra, and C\. Ré\.Simple linear attention language models balance the recall\-throughput tradeoff\.*arXiv preprint*, 2024\.
- Auton AI News \[2026\]Auton AI News\.Micron, SK hynix commit over $45 billion to boost HBM supply, May 2026\.URL[https://autonainews\.com/micron\-sk\-hynix\-commit\-over\-45\-billion\-to\-boost\-hbm\-supply/](https://autonainews.com/micron-sk-hynix-commit-over-45-billion-to-boost-hbm-supply/)\.May 20, 2026\.
- Ba et al\. \[2016\]J\. Ba, G\. Hinton, V\. Mnih, J\. Z\. Leibo, and C\. Ionescu\.Using fast weights to attend to the recent past\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2016\.
- Behrouz et al\. \[2025a\]A\. Behrouz, Z\. Li, P\. Kacham, M\. Daliri, Y\. Deng, P\. Zhong, M\. Razaviyayn, and V\. Mirrokni\.ATLAS: Learning to optimally memorize the context at test time\.*arXiv preprint arXiv:2505\.23735*, 2025a\.
- Behrouz et al\. \[2025b\]A\. Behrouz, M\. Razaviyayn, P\. Zhong, and V\. Mirrokni\.It’s all connected: A journey through test\-time memorization, attentional bias, retention, and online optimization\.*arXiv preprint arXiv:2504\.13173*, 2025b\.
- Behrouz et al\. \[2025c\]A\. Behrouz, P\. Zhong, and V\. Mirrokni\.Titans: Learning to memorize at test time\.*arXiv preprint arXiv:2501\.00663*, 2025c\.
- Burda et al\. \[2019\]Y\. Burda, H\. Edwards, A\. Storkey, and O\. Klimov\.Exploration by random network distillation\.In*International Conference on Learning Representations \(ICLR\)*, 2019\.
- Chen et al\. \[2021\]L\. Chen, K\. Lu, A\. Rajeswaran, K\. Lee, A\. Grover, M\. Laskin, P\. Abbeel, A\. Srinivas, and I\. Mordatch\.Decision transformer: Reinforcement learning via sequence modeling\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2021\.
- Cherepanov et al\. \[2025\]E\. Cherepanov, A\. K\. Kovalev, and A\. I\. Panov\.ELMUR: External layer memory with update/rewrite for long\-horizon RL\.*arXiv preprint arXiv:2510\.07151*, 2025\.CoRL 2025 RemembeRL Workshop\.
- Choromanski et al\. \[2021\]K\. Choromanski, V\. Likhosherstov, D\. Dohan, X\. Song, A\. Gane, T\. Sarlós, P\. Hawkins, J\. Davis, A\. Mohiuddin, L\. Kaiser, D\. Belanger, L\. Colwell, and A\. Weller\.Rethinking attention with performers\.In*International Conference on Learning Representations \(ICLR\)*, 2021\.
- Dai et al\. \[2026\]Y\. Dai, H\. Fu, J\. Lee, Y\. Liu, H\. Zhang, J\. Yang, C\. Finn, N\. Fazeli, and J\. Chai\.RoboMME: Benchmarking and understanding memory for robotic generalist policies\.*arXiv preprint arXiv:2603\.04639*, 2026\.URL[https://arxiv\.org/abs/2603\.04639](https://arxiv.org/abs/2603.04639)\.ICML 2026\.
- Dao and Gu \[2024\]T\. Dao and A\. Gu\.Transformers are SSMs: Generalized models and efficient algorithms through structured state space duality\.In*International Conference on Machine Learning \(ICML\)*, 2024\.
- Dao et al\. \[2022\]T\. Dao, D\. Y\. Fu, S\. Ermon, A\. Rudra, and C\. Ré\.FlashAttention: Fast and memory\-efficient exact attention with IO\-awareness\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2022\.
- Duan et al\. \[2016\]Y\. Duan, J\. Schulman, X\. Chen, P\. L\. Bartlett, I\. Sutskever, and P\. Abbeel\.RL2: Fast reinforcement learning via slow reinforcement learning\.*arXiv preprint*, 2016\.
- Feng et al\. \[2024\]Y\. Feng, J\. Lv, Y\. Cao, X\. Xie, and S\. K\. Zhou\.Ada\-KV: Optimizing KV cache eviction by adaptive budget allocation for efficient LLM inference\.*arXiv preprint arXiv:2407\.11550*, 2024\.
- Gao et al\. \[2026\]Y\. Gao, J\. Liu, S\. Li, and S\. Song\.Gated memory policy\.*arXiv preprint arXiv:2604\.18933*, 2026\.
- Ge et al\. \[2023\]S\. Ge, Y\. Zhang, L\. Liu, M\. Zhang, J\. Han, and J\. Gao\.Model tells you what to discard: Adaptive KV cache compression for LLMs\.*arXiv preprint*, 2023\.
- Gelada et al\. \[2019\]C\. Gelada, S\. Kumar, J\. Buckman, O\. Nachum, and M\. G\. Bellemare\.DeepMDP: Learning continuous latent space models for representation learning\.In*International Conference on Machine Learning \(ICML\)*, 2019\.
- Gholami et al\. \[2024\]A\. Gholami, Z\. Yao, S\. Kim, C\. Hooper, M\. W\. Mahoney, and K\. Keutzer\.AI and memory wall\.*IEEE Micro*, 44\(3\):33–39, 2024\.doi:10\.1109/mm\.2024\.3373763\.
- Gu and Dao \[2023\]A\. Gu and T\. Dao\.Mamba: Linear\-time sequence modeling with selective state spaces\.*arXiv preprint arXiv:2312\.00752*, 2023\.
- Gu et al\. \[2022\]A\. Gu, K\. Goel, and C\. Ré\.Efficiently modeling long sequences with structured state spaces\.In*International Conference on Learning Representations \(ICLR\)*, 2022\.URL[https://arxiv\.org/abs/2111\.00396](https://arxiv.org/abs/2111.00396)\.
- Gupta et al\. \[2025\]G\. Gupta et al\.Memo: Training memory\-efficient embodied agents with reinforcement learning\.*arXiv preprint arXiv:2510\.19732*, 2025\.
- Hafner et al\. \[2021\]D\. Hafner, T\. Lillicrap, M\. Norouzi, and J\. Ba\.Mastering atari with discrete world models\.In*International Conference on Learning Representations \(ICLR\)*, 2021\.
- Hatamizadeh et al\. \[2026\]A\. Hatamizadeh, Y\. Choi, and J\. Kautz\.Gated DeltaNet\-2: Decoupling erase and write in linear attention\.*arXiv preprint arXiv:2605\.22791*, 2026\.URL[https://arxiv\.org/abs/2605\.22791](https://arxiv.org/abs/2605.22791)\.Per\-step channel\-wise erase\+write gates in linear attention; LM\-only; no certificate\.
- Hooper et al\. \[2024\]C\. Hooper, S\. Kim, H\. Mohammadzadeh, M\. W\. Mahoney, Y\. S\. Shao, K\. Keutzer, and A\. Gholami\.KVQuant: Towards 10 million context length LLM inference with KV cache quantization\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2024\.
- Ivanov et al\. \[2021\]A\. Ivanov, N\. Dryden, T\. Ben\-Nun, S\. Li, and T\. Hoefler\.Data movement is all you need: A case study on optimizing transformers\.In*Conference on Machine Learning and Systems \(MLSys\)*, 2021\.
- Kapturowski et al\. \[2019\]S\. Kapturowski, G\. Ostrovski, J\. Quan, R\. Munos, and W\. Dabney\.Recurrent experience replay in distributed reinforcement learning\.In*International Conference on Learning Representations \(ICLR\)*, 2019\.URL[https://openreview\.net/forum?id=r1lyTjAqYX](https://openreview.net/forum?id=r1lyTjAqYX)\.
- Kumar et al\. \[2021\]A\. Kumar, Z\. Fu, D\. Pathak, and J\. Malik\.RMA: Rapid motor adaptation for legged robots\.In*Robotics: Science and Systems \(RSS\)*, 2021\.doi:10\.15607/RSS\.2021\.XVII\.011\.URL[https://doi\.org/10\.15607/RSS\.2021\.XVII\.011](https://doi.org/10.15607/RSS.2021.XVII.011)\.
- Kwon et al\. \[2023\]W\. Kwon, Z\. Li, S\. Zhuang, Y\. Sheng, L\. Zheng, C\. H\. Yu, J\. E\. Gonzalez, H\. Zhang, and I\. Stoica\.Efficient memory management for large language model serving with PagedAttention\.In*ACM Symposium on Operating Systems Principles \(SOSP\)*, 2023\.
- Li et al\. \[2024\]Y\. Li, Y\. Huang, B\. Yang, B\. Venkitesh, A\. Locatelli, H\. Ye, T\. Cai, P\. Lewis, and D\. Chen\.SnapKV: LLM knows what you are looking for before generation\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2024\.
- Littman et al\. \[2001\]M\. L\. Littman, R\. S\. Sutton, and S\. Singh\.Predictive representations of state\.In*Advances in Neural Information Processing Systems \(NIPS\)*, 2001\.URL[https://proceedings\.neurips\.cc/paper/2001](https://proceedings.neurips.cc/paper/2001)\.
- Liu et al\. \[2024a\]J\. Liu, M\. Liu, Z\. Wang, et al\.RoboMamba: Efficient vision\-language\-action model for robotic reasoning and manipulation\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2024a\.
- Liu et al\. \[2023\]Z\. Liu, A\. Desai, F\. Liao, W\. Wang, V\. Xie, Z\. Xu, A\. Kyrillidis, and A\. Shrivastava\.Scissorhands: Exploiting the persistence of importance hypothesis for LLM KV cache compression at test time\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2023\.
- Liu et al\. \[2024b\]Z\. Liu, J\. Yuan, H\. Jin, S\. Zhong, Z\. Xu, V\. Braverman, B\. Chen, and X\. Hu\.KIVI: A tuning\-free asymmetric 2bit quantization for KV cache\.In*International Conference on Machine Learning \(ICML\)*, 2024b\.
- Mitra et al\. \[2026\]S\. Mitra, E\. Yuceel, N\. Giles, and A\. Pai\.Factored diffusion policies: Compositionally generalized robot control with a single score network\.*arXiv preprint arXiv:2605\.22596*, 2026\.URL[https://arxiv\.org/abs/2605\.22596](https://arxiv.org/abs/2605.22596)\.Trajectory\-tube closed\-loop certificate for diffusion policy composition; certifies composition NOT memory sufficiency\.
- Morad et al\. \[2023\]S\. Morad, R\. Kortvelesy, M\. Bettini, S\. Liwicki, and A\. Prorok\.POPGym: Benchmarking partially observable reinforcement learning\.In*International Conference on Learning Representations \(ICLR\)*, 2023\.
- Moschella et al\. \[2026\]L\. Moschella, L\. Manduchi, and O\. Sener\.Learning to evict from key\-value cache\.*arXiv preprint arXiv:2602\.10238*, 2026\.
- Moyer \[2026\]B\. Moyer\.Flash getting stacked high\-bandwidth version\.Semiconductor Engineering, May 2026\.URL[https://semiengineering\.com/flash\-getting\-stacked\-high\-bandwidth\-version/](https://semiengineering.com/flash-getting-stacked-high-bandwidth-version/)\.May 14, 2026\.
- Pathak et al\. \[2017\]D\. Pathak, P\. Agrawal, A\. A\. Efros, and T\. Darrell\.Curiosity\-driven exploration by self\-supervised prediction\.In*International Conference on Machine Learning \(ICML\)*, 2017\.
- Peng et al\. \[2023\]B\. Peng, E\. Alcaide, Q\. Anthony, et al\.RWKV: Reinventing RNNs for the transformer era\.In*Findings of the Association for Computational Linguistics: EMNLP 2023*, 2023\.doi:10\.18653/v1/2023\.findings\-emnlp\.936\.URL[https://aclanthology\.org/2023\.findings\-emnlp\.936](https://aclanthology.org/2023.findings-emnlp.936)\.
- Qiu et al\. \[2026\]W\. Qiu, T\. Huang, and R\. Ying\.Efficient long\-horizon vision\-language\-action models via static\-dynamic disentanglement\.*arXiv preprint arXiv:2602\.03983*, 2026\.
- Ramsauer et al\. \[2021\]H\. Ramsauer, B\. Schäfl, J\. Lehner, P\. Seidl, M\. Widrich, T\. Adler, L\. Gruber, M\. Holzleitner, M\. Pavlović, G\. K\. Sandve, V\. Greiff, D\. Kreil, M\. Kopp, G\. Klambauer, J\. Brandstetter, and S\. Hochreiter\.Hopfield networks is all you need\.In*International Conference on Learning Representations \(ICLR\)*, 2021\.
- Roy et al\. \[2005\]N\. Roy, G\. Gordon, and S\. Thrun\.Finding approximate POMDP solutions through belief compression\.*Journal of Artificial Intelligence Research*, 23:1–40, 2005\.URL[http://www\.cs\.cmu\.edu/~ggordon/roy\-gordon\-thrun\.belief\-compression\-jair\.pdf](http://www.cs.cmu.edu/~ggordon/roy-gordon-thrun.belief-compression-jair.pdf)\.
- Schlag et al\. \[2021\]I\. Schlag, K\. Irie, and J\. Schmidhuber\.Linear transformers are secretly fast weight programmers\.In*International Conference on Machine Learning \(ICML\)*, 2021\.
- Smith et al\. \[2023\]J\. T\. Smith, A\. Warrington, and S\. W\. Linderman\.Simplified state space layers for sequence modeling\.*arXiv preprint*, 2023\.URL[https://arxiv\.org/abs/2208\.04933](https://arxiv.org/abs/2208.04933)\.
- Sridhar et al\. \[2025\]A\. Sridhar, J\. Pan, S\. Sharma, and C\. Finn\.MemER: Scaling up memory for robot control via experience retrieval\.*arXiv preprint arXiv:2510\.20328*, 2025\.
- Subramanian et al\. \[2022\]J\. Subramanian, A\. Sinha, R\. Seraj, and A\. Mahajan\.Approximate information state for approximate planning and reinforcement learning in partially observed systems\.*Journal of Machine Learning Research*, 23\(12\):1–83, 2022\.URL[https://jmlr\.org/papers/v23/20\-1165\.html](https://jmlr.org/papers/v23/20-1165.html)\.
- Sun et al\. \[2023\]Y\. Sun, L\. Dong, S\. Huang, S\. Ma, Y\. Xia, J\. Xue, F\. Wei, et al\.Retentive network: A successor to Transformer for large language models\.*arXiv preprint arXiv:2307\.08621*, 2023\.
- Sun et al\. \[2024\]Y\. Sun, X\. Li, K\. Dalal, J\. Xu, A\. Vikram, G\. Zhang, Y\. Dubois, X\. Chen, X\. Wang, S\. Koyejo, T\. Hashimoto, and C\. Guestrin\.Learning to \(learn at test time\): RNNs with expressive hidden states\.*arXiv preprint arXiv:2407\.04620*, 2024\.
- Swain et al\. \[2026a\]K\. Swain, S\. Han, D\. K\. I\. Weidele, M\. Martino, and A\. Torralba\.Tensor cache: Eviction\-conditioned associative memory for transformers\.*arXiv preprint arXiv:2605\.22884*, 2026a\.URL[https://arxiv\.org/abs/2605\.22884](https://arxiv.org/abs/2605.22884)\.MIT/Torralba group; bounded fast\-weight prior; LM\-only, eviction\-triggered write, no certificate\.
- Swain et al\. \[2026b\]K\. Swain, S\. Han, D\. K\. I\. Weidele, M\. Martino, and A\. Torralba\.Tensor memory: Fixed\-size recurrent state for long\-horizon transformers\.*arXiv preprint arXiv:2605\.27686*, 2026b\.URL[https://arxiv\.org/abs/2605\.27686](https://arxiv.org/abs/2605.27686)\.Fixed\-size 3D recurrent tensor; spatial soft\-write; perception loss; no control\-rate, no certificate\.
- TechTimes \[2026\]TechTimes\.DRAM prices reach all\-time high at $20: Q2 increase slows as PC deals close, May 2026\.URL[http://www\.techtimes\.com/articles/317403/20260530/dram\-prices\-reach\-all\-time\-high\-20\-q2\-increase\-slows\-pc\-deals\-close\.htm](http://www.techtimes.com/articles/317403/20260530/dram-prices-reach-all-time-high-20-q2-increase-slows-pc-deals-close.htm)\.May 30, 2026; TrendForce / DRAMeXchange data\.
- Tishby et al\. \[1999\]N\. Tishby, F\. C\. Pereira, and W\. Bialek\.The information bottleneck method\.In*Proceedings of the 37th Annual Allerton Conference on Communication, Control and Computing*, pages 368–377, 1999\.
- Torne et al\. \[2026\]M\. Torne, K\. Pertsch, H\. Walke, K\. Vedder, S\. Nair, B\. Ichter, A\. Z\. Ren, H\. Wang, J\. Tang, K\. Stachowicz, K\. Dhabalia, M\. Equi, Q\. Vuong, J\. T\. Springenberg, S\. Levine, C\. Finn, and D\. Driess\.MEM: Multi\-scale embodied memory for vision language action models\.*arXiv preprint arXiv:2603\.03596*, 2026\.URL[https://arxiv\.org/abs/2603\.03596](https://arxiv.org/abs/2603.03596)\.Mixed\-modal embodied memory \(video\+text\); not O\(1\) VRAM; no action\-gate; no certificate\.
- Tu et al\. \[2024\]D\. Tu, D\. Vashchilenko, Y\. Lu, and P\. Xu\.VL\-Cache: Sparsity and modality\-aware KV cache compression for vision\-language model inference acceleration\.*arXiv preprint arXiv:2410\.23317*, 2024\.
- Xiao et al\. \[2024\]G\. Xiao, Y\. Tian, B\. Chen, S\. Han, and M\. Lewis\.Efficient streaming language models with attention sinks\.In*International Conference on Learning Representations \(ICLR\)*, 2024\.
- Xu et al\. \[2025a\]S\. Xu, Y\. Wang, C\. Xia, D\. Zhu, T\. Huang, and C\. Xu\.VLA\-Cache: Efficient vision\-language\-action manipulation via adaptive token caching\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2025a\.
- Xu et al\. \[2025b\]W\. Xu, L\. Zhuang, and L\. Shan\.KV\-Efficient VLA: A method of speed up vision language model with RNN\-gated chunked KV cache\.*arXiv preprint arXiv:2509\.21354*, 2025b\.
- Yang et al\. \[2024\]S\. Yang, B\. Wang, Y\. Shen, R\. Panda, and Y\. Kim\.Gated linear attention transformers with hardware\-efficient training\.In*International Conference on Machine Learning \(ICML\)*, 2024\.
- Yang et al\. \[2025\]Y\. Yang, Y\. Wang, Z\. Wen, Z\. Luo, C\. Zou, Z\. Zhang, C\. Wen, and L\. Zhang\.EfficientVLA: Training\-free acceleration and compression for vision\-language\-action models\.*arXiv preprint arXiv:2506\.10100*, 2025\.
- Zacks Investment Research \[2026\]Zacks Investment Research\.Micron stock slips despite blowout earnings, upbeat guidance, May 2026\.URL[https://www\.zacks\.com/commentary/2886800/micron\-stock\-slips\-despite\-blowout\-earnings\-upbeat\-guidance](https://www.zacks.com/commentary/2886800/micron-stock-slips-despite-blowout-earnings-upbeat-guidance)\.May 22, 2026\.
- Zhang et al\. \[2021\]A\. Zhang, R\. McAllister, R\. Calandra, Y\. Gal, and S\. Levine\.Learning invariant representations for reinforcement learning without reconstruction\.In*International Conference on Learning Representations \(ICLR\)*, 2021\.
- Zhang et al\. \[2025\]T\. Zhang et al\.Test\-time training done right\.*arXiv preprint arXiv:2505\.23884*, 2025\.Also available at OpenReview Tb9qAxT3xv\.
- Zhang et al\. \[2023\]Z\. Zhang, Y\. Sheng, T\. Zhou, T\. Chen, L\. Zheng, R\. Cai, Z\. Song, Y\. Tian, C\. Ré, C\. Barrett, Z\. Wang, and B\. Chen\.H2O: Heavy\-hitter oracle for efficient generative inference of large language models\.In*Advances in Neural Information Processing Systems \(NeurIPS\)*, 2023\.

## Appendix AProofs \(full detail\)

### A\.1Proof of Theorem[4\.3](https://arxiv.org/html/2606.02775#S4.Thmtheorem3)\(full detail\)

We reproduce the full four\-step proof for self\-containment\.

#### Notation\.

Write thetruediscounted Bellman optimality operator on historiesℬ\\mathcal\{B\}and thesurrogateoperator on𝒵\\mathcal\{Z\},ℬ^\\hat\{\\mathcal\{B\}\}:

\(ℬ​V\)​\(h,a\)=𝔼​\[R∣h,a\]\+γ​𝔼​\[V​\(H′\)∣h,a\],\(ℬ^​V^\)​\(z,a\)=r^​\(z,a\)\+γ​∫𝒵V^​\(z′\)​P^​\(d​z′∣z,a\)\.\(\\mathcal\{B\}V\)\(h,a\)=\\mathbb\{E\}\[R\\mid h,a\]\+\\gamma\\,\\mathbb\{E\}\[V\(H^\{\\prime\}\)\\mid h,a\],\\qquad\(\\hat\{\\mathcal\{B\}\}\\hat\{V\}\)\(z,a\)=\\hat\{r\}\(z,a\)\+\\gamma\\\!\\int\_\{\\mathcal\{Z\}\}\\\!\\hat\{V\}\(z^\{\\prime\}\)\\,\\hat\{P\}\(dz^\{\\prime\}\\mid z,a\)\.Both areγ\\gamma\-contractions in∥⋅∥∞\\\|\\cdot\\\|\_\{\\infty\}\(A1, A4\);V∗=ℬ​V∗V^\{\*\}=\\mathcal\{B\}V^\{\*\},V^∗=ℬ^​V^∗\\hat\{V\}^\{\*\}=\\hat\{\\mathcal\{B\}\}\\hat\{V\}^\{\*\}\. For a historyhth\_\{t\}we abbreviatezt=σt​\(ht\)z\_\{t\}=\\sigma\_\{t\}\(h\_\{t\}\)\.

#### Step 1: dual \(IPM\) inequality\.

For any boundedffandμ,ν∈Δ​\(𝒵\)\\mu,\\nu\\in\\Delta\(\\mathcal\{Z\}\), the Minkowski functionalρF​\(f\)\\rho\_\{F\}\(f\)\(the smallestρ\>0\\rho\>0withρ−1​f∈F\\rho^\{\-1\}f\\in F\) satisfies\|∫f​𝑑μ−∫f​𝑑ν\|≤ρF​\(f\)​dF​\(μ,ν\)\\bigl\|\\int f\\,d\\mu\-\\int f\\,d\\nu\\bigr\|\\leq\\rho\_\{F\}\(f\)\\,d\_\{F\}\(\\mu,\\nu\)\. Apply withf=V^∗f=\\hat\{V\}^\{\*\},μ=μt\\mu=\\mu\_\{t\}\(true next\-state law\),ν=νt=P^\(⋅∣zt,at\)\\nu=\\nu\_\{t\}=\\hat\{P\}\(\\cdot\\mid z\_\{t\},a\_\{t\}\)\. Using \(AP2\),dF​\(μt,νt\)≤δd\_\{F\}\(\\mu\_\{t\},\\nu\_\{t\}\)\\leq\\delta:

\|𝔼\[V^∗\(Zt\+1\)∣Ht=ht,At=at\]−∫V^∗\(z′\)P^\(dz′∣zt,at\)\|≤LVδ\.\\Bigl\|\\,\\mathbb\{E\}\[\\hat\{V\}^\{\*\}\(Z\_\{t\+1\}\)\\mid H\_\{t\}=h\_\{t\},A\_\{t\}=a\_\{t\}\]\\;\-\\;\\int\\hat\{V\}^\{\*\}\(z^\{\\prime\}\)\\,\\hat\{P\}\(dz^\{\\prime\}\\mid z\_\{t\},a\_\{t\}\)\\,\\Bigr\|\\;\\leq\\;L\_\{V\}\\,\\delta\.\(A\.1\)

#### Step 2: one\-step Bellman mismatch\.

At any reachable\(ht,at\)\(h\_\{t\},a\_\{t\}\):

\|\(ℬ​V^∗\)​\(ht,at\)−\(ℬ^​V^∗\)​\(zt,at\)\|\\displaystyle\\bigl\|\(\\mathcal\{B\}\\hat\{V\}^\{\*\}\)\(h\_\{t\},a\_\{t\}\)\-\(\\hat\{\\mathcal\{B\}\}\\hat\{V\}^\{\*\}\)\(z\_\{t\},a\_\{t\}\)\\bigr\|≤\|𝔼\[Rt∣ht,at\]−r^\(zt,at\)\|⏟≤ε​by \(AP1\)\+γ​\|𝔼\[V^∗\(Zt\+1\)∣ht,at\]−∫V^∗dνt\|⏟≤LV​δ​by \(A\.1\)\\displaystyle\\leq\\underbrace\{\\bigl\|\\mathbb\{E\}\[R\_\{t\}\\mid h\_\{t\},a\_\{t\}\]\-\\hat\{r\}\(z\_\{t\},a\_\{t\}\)\\bigr\|\}\_\{\\leq\\,\\varepsilon\\text\{ by \(AP1\)\}\}\\;\+\\;\\gamma\\,\\underbrace\{\\bigl\|\\mathbb\{E\}\[\\hat\{V\}^\{\*\}\(Z\_\{t\+1\}\)\\mid h\_\{t\},a\_\{t\}\]\-\\int\\hat\{V\}^\{\*\}\\,d\\nu\_\{t\}\\bigr\|\}\_\{\\leq\\,L\_\{V\}\\delta\\text\{ by \(A\.1\)\}\}≤ε\+γLVδ=:η\.\\displaystyle\\leq\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta\\;=:\\;\\eta\.\(A\.2\)

#### Step 3: contraction propagates the one\-step error\.

Letα=suph\|V∗​\(h\)−V^∗​\(σ​\(h\)\)\|\\alpha=\\sup\_\{h\}\|V^\{\*\}\(h\)\-\\hat\{V\}^\{\*\}\(\\sigma\(h\)\)\|\(finite by A1\)\. SinceV∗=ℬ​V∗V^\{\*\}=\\mathcal\{B\}V^\{\*\}, using \(A\.2\) and theγ\\gamma\-contraction ofℬ\\mathcal\{B\}:

α≤γ​α\+η,⇒α≤η1−γ=ε\+γ​LV​δ1−γ\.\\alpha\\leq\\gamma\\alpha\+\\eta,\\quad\\Rightarrow\\quad\\alpha\\;\\leq\\;\\frac\{\\eta\}\{1\-\\gamma\}\\;=\\;\\frac\{\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta\}\{1\-\\gamma\}\.This proves part \(i\)\.

#### Step 4: value approximation to closed\-loop loss \(factor of 2\)\.

LetπZ\\pi\_\{Z\}be greedy w\.r\.t\.Q^∗\\hat\{Q\}^\{\*\}\. For any state:

V∗​\(h\)−VπZ​\(h\)=\(V∗​\(h\)−V^∗​\(σ​\(h\)\)\)⏟≤α​by \(A\.3\)\+\(V^∗​\(σ​\(h\)\)−VπZ​\(h\)\)⏟≤α​by policy\-eval bound\.V^\{\*\}\(h\)\-V^\{\\pi\_\{Z\}\}\(h\)=\\underbrace\{\\bigl\(V^\{\*\}\(h\)\-\\hat\{V\}^\{\*\}\(\\sigma\(h\)\)\\bigr\)\}\_\{\\leq\\,\\alpha\\text\{ by \(A\.3\)\}\}\+\\underbrace\{\\bigl\(\\hat\{V\}^\{\*\}\(\\sigma\(h\)\)\-V^\{\\pi\_\{Z\}\}\(h\)\\bigr\)\}\_\{\\leq\\,\\alpha\\text\{ by policy\-eval bound\}\}\.The first term is≤α\\leq\\alphaby part \(i\)\. For the second, the deviation between the surrogate\-evaluated and truly\-evaluated value ofπZ\\pi\_\{Z\}is controlled by the one\-step residualη\\etapropagated through theγ\\gamma\-contraction of the policy\-evaluation Bellman operator, giving≤η/\(1−γ\)=α\\leq\\eta/\(1\-\\gamma\)=\\alpha\. Adding:

\|V∗​\(h\)−VπZ​\(h\)\|≤2​α=2​\(ε\+γ​LV​δ\)1−γ\.\\bigl\|V^\{\*\}\(h\)\-V^\{\\pi\_\{Z\}\}\(h\)\\bigr\|\\;\\leq\\;2\\alpha\\;=\\;\\frac\{2\\,\(\\varepsilon\+\\gamma\\,L\_\{V\}\\,\\delta\)\}\{1\-\\gamma\}\.This factor of 2 matchesSubramanian et al\. \[[49](https://arxiv.org/html/2606.02775#bib.bib49)\]Thm 9/27 exactly\.■\\blacksquare

### A\.2WhatLVL\_\{V\}is, per metric

The constantLV=ρF​\(V^∗\)L\_\{V\}=\\rho\_\{F\}\(\\hat\{V\}^\{\*\}\)is the Minkowski functional of the surrogate value function w\.r\.t\. the IPM classFF:

- •Total variation\(dF=TV\)\(d\_\{F\}\{=\}\\mathrm\{TV\}\):LV=12​span​\(V^∗\)=12​\(max⁡V^∗−min⁡V^∗\)≤12⋅Rmax−Rmin1−γL\_\{V\}=\\tfrac\{1\}\{2\}\\,\\mathrm\{span\}\(\\hat\{V\}^\{\*\}\)=\\tfrac\{1\}\{2\}\(\\max\\hat\{V\}^\{\*\}\-\\min\\hat\{V\}^\{\*\}\)\\leq\\tfrac\{1\}\{2\}\\cdot\\frac\{R\_\{\\max\}\-R\_\{\\min\}\}\{1\-\\gamma\}\.
- •Wasserstein\-1\(dF=W1\)\(d\_\{F\}\{=\}W\_\{1\}\):LV=‖V^∗‖LipL\_\{V\}=\\\|\\hat\{V\}^\{\*\}\\\|\_\{\\mathrm\{Lip\}\}, the Lipschitz constant of the value function on\(𝒵,d\)\(\\mathcal\{Z\},d\)\.

In both casesLV<∞L\_\{V\}<\\inftyunder \(A1\)\+\(A3\) and the bound reads2​\(ε\+γ​LV​δ\)/\(1−γ\)2\(\\varepsilon\+\\gamma L\_\{V\}\\delta\)/\(1\-\\gamma\)\. At current experimental scale, the numerically instantiatedLVL\_\{V\}\-loaded bound isvacuous\(guaranteed form52\.6952\.69vs\. trivial value span10\.010\.0; see §[6\.6](https://arxiv.org/html/2606.02775#S6.SS6)\); we report it transparently alongside the tighterΔ∗\\Delta^\{\*\}form \(Remark[4\.4](https://arxiv.org/html/2606.02775#S4.Thmtheorem4)\)\.

## Appendix BAdditional experimental details

### B\.1Hyperparameter table

Table 5:Training hyperparameters \(TrainConfig\)\.
### B\.2Parameter\-count disclosure

Total parameter counts by variant and state budget \(verified byreport\_params\.py; runlean\-20260530\-1449\)\. Parameters scale with the state dimensionN=dk=dvN\{=\}d\_\{k\}\{=\}d\_\{v\}; the five primary parity variants \(AURA\-Mem,fixed\_size\_state,write\_every\_step,random\_write,periodic\_write\) match*exactly*at every budget \(identical totals, not a±\\pmtolerance band\)\.full\_recurrence,learned\_token\_gate, andno\_memorydiffer by architecture and are disclosed separately\.

Table 6:Total parameter counts by variant across state budgetsN=dk=dv∈\{16,32,64\}N\{=\}d\_\{k\}\{=\}d\_\{v\}\\in\\\{16,32,64\\\}\.The gradient\-active counts at theN=32N\{=\}32reference are 21,447 for AURA\-Mem versus 15,110 for the scheduled\-write parity variants \(write\_every\_step,fixed\_size\_state,random\_write,periodic\_write\), the\+6,337\+6\{,\}337gate\_mlpasymmetry discussed below\.

Predictor\-head disclosure\.TheGatedTTTState\.predictorsub\-head \(8,320 parameters at this size\) is*allocated but never called*in any variant’s forward pass; a backward\-pass audit confirms its gradient isNonefor every variant\. It inflates all nominal counts by 8,320 without contributing computation; it should be removed before final checkpoint release\.

Gradient\-active asymmetry\.AURA\-Mem has 21,447 gradient\-active parameters versus 15,110 for the scheduled\-write variants, a difference of\+6,337\+6\{,\}337\(\+41\.9%\+41\.9\\%\), because thegate\_mlpis gradient\-active only in AURA\-Mem\. The framing “ours==write\-every\-step minus the gate” is architecturally accurate but understates this capacity advantage \(§[7](https://arxiv.org/html/2606.02775#S7), item 4\)\.

GRU configuration\.full\_recurrenceusesgru\_hidden=53=53\(−0\.52%\-0\.52\\%vs\. ours nominal\) to correct a prior configuration wherehidden=32=32left the GRU materially under\-parameterized; any results usinghidden=32=32were invalid and discarded\.

### B\.3Reproducibility commands

```
# Deploy sweep app (one-time):
modal deploy aura/lean_sweep.py

# Launch main hard-task sweep:
modal run --detach aura/lean_sweep.py --max-concurrent 10

# Collect and aggregate results:
python -m aura.lean_aggregate --run-tag lean-YYYYMMDD-HHMM

# Check proof gates:
python aura/check_proof_matrix.py --run-tag lean-YYYYMMDD-HHMM

# Single-seed reference run:
python -m aura.train --variant ours --task noisy_long_recall \
  --seeds 0 1 2 --max-steps 4000 --seq-len 96 \
  --batch-size 64 --lr 3e-3 --beta 1e-3 --gamma 3e-3 \
  --write-target-rho 0.15 --state-dim 32 --device cuda
```

### B\.4Extended horizon\-stress detail

The main\-text crossover figure \(Figure[7](https://arxiv.org/html/2606.02775#S6.F7)\) shows the constant\-vs\-linear carried\-state separation near the practically relevant short\-horizon regime\. For completeness we include the full 100,000\-step horizon\-stress measurement below \(Figure[14](https://arxiv.org/html/2606.02775#A2.F14)\), which extends the same constant\-vs\-growing comparison out to the long horizon and quantifies the6,061×6\{,\}061\\timesseparation; it complements, rather than duplicates, the main\-text figure\.

![Refer to caption](https://arxiv.org/html/2606.02775v1/x14.png)Figure 14:Extended 100k\-step horizon\-stress detail: memory footprint vs\. sequence horizon\(log–log; NVIDIA L40S, run20260530\-endless\-100k, 100,000 steps, 500 logged checkpoints\)\. This is the extended long\-horizon companion to the main\-text crossover figure \(Figure[7](https://arxiv.org/html/2606.02775#S6.F7)\): the same constant\-vs\-growing comparison carried out to 100,000 steps\. AURA\-Mem’s inference state \(blue\) occupies a*constant*𝟒,𝟐𝟐𝟒\\mathbf\{4\{,\}224\}bytesat every step, computed by the closed\-form formula\(dk​dv\+dv\)×batch×4\(d\_\{k\}d\_\{v\}\+d\_\{v\}\)\{\\times\}\\text\{batch\}\{\\times\}4\(dk=dv=32d\_\{k\}\{=\}d\_\{v\}\{=\}32, batch=1=1, fp32\) and confirmed identical across all 500 logged steps, while a growing\-KV reference stub \(vermillion dashed; same dimensions, local untrained reference,256256bytes/step analytic\) reaches𝟐𝟓,𝟔𝟎𝟎,𝟎𝟎𝟎\\mathbf\{25\{,\}600\{,\}000\}bytes\(25\.6 MB\) at step 100,000, a ratio of𝟔,𝟎𝟔𝟏×\\mathbf\{6\{,\}061\\times\}larger\. \(O\(1\) refers to the inference state only; see §[3\.2](https://arxiv.org/html/2606.02775#S3.SS2)\.\) The 4,224\-byte figure is the architectural state formula and must not be conflated with the peak CUDA allocator reading \(cuda\_max\_memory\_allocated=43,051,008=43\{,\}051\{,\}008bytes, which includes weights, activations, and transient buffers\); the KV contrast uses a local untrained stub, not a trained transformer\.

## Appendix CModel card \(abridged\)

#### Intended use\.

Research benchmarking of bounded\-memory policies on synthetic tasks; ablations on write\-gating, IB compression, and bandwidth efficiency; long\-horizon control on memory\-constrained hardware \(proof\-of\-concept, research only\)\.Not validated forreal\-robot deployment, safety\-critical or unmonitored use, or non\-embodied workloads\.

#### Configuration\.

The released checkpoint \(Kaikaku/aura\) usesdk=dv=64d\_\{k\}\{=\}d\_\{v\}\{=\}64\(55,111 parameters, 16,640\-byte inference state\) and differs from the sweep configuration \(dk=dv=Nd\_\{k\}\{=\}d\_\{v\}\{=\}N, 30,279 parameters at theN=32N\{=\}32reference\) used for all experimental results; the two must not be cross\-cited \(§[7](https://arxiv.org/html/2606.02775#S7), item 7\)\.

#### Limitations \(required disclosure\)\.

All evaluation is on synthetic benchmarks \(noisy\_long\_recall,sparse\_recall\); no real\-robot validation\. Theε\\varepsilonandδ\\deltavalues are action self\-consistency diagnostics,*not*formal theorem\-certificate values, and the instantiated value\-loss bound is vacuous at current scale\.

#### Citation\.

```
@article{josefchen2026auramem,
  title   = {Write Only What You’d Act On: Learned Action-Error Gating
             for O(1)-VRAM Robot Policies},
  author  = {Josef Chen},
  journal = {Preprint},
  year    = {2026},
  url     = {https://huggingface.co/Kaikaku/aura}
}
```

## Appendix DBroader impact

Reducing inference\-state VRAM and memory\-write traffic for robot policies lowers the barrier to on\-device deployment of capable vision\-language\-action models on memory\-constrained edge hardware\. Because every autoregressive step issues a memory write, and because high\-bandwidth memory is the scarce, expensive resource currently bottlenecking physical\-AI deployment, a4\.984\.98–9\.19×9\.19\\timesreduction in writes per second suggests a proportional reduction in DRAM/HBM write traffic, a first\-order driver of energy cost on LPDDR/HBM hardware\. We emphasize, however, that we measure*write counts*, not joules: any energy implication is a proxy argument, and measured energy savings would require hardware\-level experiments beyond this paper’s scope\. We make no measured\-energy claims\.

The principal risk is the usual dual\-edged consequence of efficiency: gains that make capable policies cheaper to deploy can also accelerate deployment into unmonitored or safety\-critical settings before adequate validation\. AURA\-Mem is validated only on synthetic benchmarks and is explicitly not certified for real\-robot or safety\-critical use; deployers should treat it as a research artifact requiring appropriate human oversight and task\-specific safety validation\. We identify no application\-specific dual\-use concern beyond this general efficiency consideration: the contribution is a general memory\-efficiency mechanism rather than a capability targeted at a sensitive domain\.