EMiX: Emulating Beyond Single-FPGA Limits

# EMiX: Emulating Beyond Single-FPGA Limits
Source: [https://arxiv.org/abs/2604.27012](https://arxiv.org/abs/2604.27012)
[View PDF](https://arxiv.org/pdf/2604.27012)[HTML \(experimental\)](https://arxiv.org/html/2604.27012v1)

> Abstract:FPGA\-level emulation is a key step in pre\-silicon chip design validation\. However, emulating large\-scale multi\-core systems increasingly exceed the hardware resource capacity of a single FPGA, limiting the feasibility of full\-system emulation\. To address this challenge, we introduce EMiX, a scalable multi\-FPGA framework that enables distributed emulation of multi\-core RISC\-V architectures beyond single\-FPGA resource limits\. EMiX systematically partitions a monolithic multi\-core design into multiple components and deploys them across multiple interconnected FPGAs, effectively exploiting inter\-FPGA interconnects to balance scalability and performance without requiring fundamental RTL redesign\. We prototype EMiX with a 64\-core architecture across eight interconnected Alveo U55c FPGAs \(scalable on core and FPGA counts\), successfully demonstrating full\-system execution including Linux boot\. EMiX will be released as an open\-source platform\.

## Submission history

From: Behzad Salami \[[view email](https://arxiv.org/show-email/5c931f29/2604.27012)\] **\[v1\]**Wed, 29 Apr 2026 10:32:10 UTC \(704 KB\)