The hearts of the Super Nintendo

Fabien Sanglard News

Summary

A detailed examination of the clock generation hardware in the Super Nintendo, explaining the two oscillators and the adjustable capacitor used to produce the required frequencies.

No content available
Original Article
View Cached Full Text

Cached at: 05/16/26, 03:36 AM

# The hearts of the Super Nintendo Source: [https://fabiensanglard.net/snes_hearts/index.html](https://fabiensanglard.net/snes_hearts/index.html) Apr 1, 2024 The hearts of the Super Nintendo --- When I start studying a vintage system, the first thing I like to do is understand how its components work together at the hardware level[\[1\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_1)\. Every computer has at least one heart which dictates the tempo to all the other chips\. The**C**lo**CK**output pin is connected to a copper line which spreads to most components, into their`CLK`input pin\. If you are mostly a software person like me, you may have never noticed it but all kinds of processors have a`CLK`input pin\. From CPUs \(Motorola 68000[\[2\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_2), Intel Pentium[\[3\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_3), MOS 6502[\[4\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_4)\), to custom graphic chips \(Midway's DMA2[\[5\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_5), Capcom CPS\-A[\[6\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_6)/CPS\-B[\[7\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_7), Sega's Genesis VDP[\[8\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_8)\) to audio chips \(Yamaha 2151[\[9\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_9), OKI msm6295[\[10\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_10)\), they all have one\. How is the CLK generated? --- The`CLK`can be generated by two types of components\. One is a[crystal oscillator](https://en.wikipedia.org/wiki/Crystal_oscillator#:~:text=The%20crystal%20oscillator%20circuit%20sustains,and%20size%20of%20the%20crystal)which usually looks like a flattened capsule\. The others are named[ceramic resonators](https://en.wikipedia.org/wiki/Ceramic_resonator)\. These are[vertical](https://fabiensanglard.net/snes_hearts/ceramic_resonator_sideview.webp)capacitor which look less high\-tech than the crystals \(and they also happen to drift over time\)\. Let's open it already\! --- With this in mind, let's peek inside a Super Nintendo\. Can you find the`CLK`generators on a SNES motherboard? Clue: There are two\. ![](https://fabiensanglard.net/snes_hearts/Nintendo_SNS-CPU-GPM-02_SNES_Motherboard.webp)*[Source](https://consolemods.org/wiki/SNES:SNES_Model_Differences)\. Click the image to find the CLK generators\.*Two hearts --- In the X2 slot, the blue thingy is a`24\.576`MHz ceramic resonator\. It is located on the side where the audio chips are so it sets the pace of the**A**udio**P**rocessing**U**nit\. In the X1 slot, the yellow one is labeled`D21L3`\. It is a`21\.300`MHz oscillator\. It is located near \(and sets the pace of\) the CPU and the**P**icture**P**rocessing**U**nit\. Documentation discrepancies --- Looking at the Super Nintendo developer guide[\[11\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_11)reveals it does not match our observations\. ![](https://fabiensanglard.net/snes_hearts/arch.webp)The diagram shows not two but three oscillators \(there is one feeding the CIC chip, responsible for copy\-protection\)\. We are missing one\! Moreover, the frequency for the CPU/PPU is documented as`21\.47727`MHz but we found a`21\.300`Mhz oscillator \(this is a PAL motherboard, an NTSC one would have featured a`21\.500`Mhz oscillator\)\. What is going on here? CPU/PPU: From`21\.500`MHz to`21\.47727`MHz --- If we look at the motherboard again, we will notice a red component in the lower left, just next to the oscillator\. This red thingy is a variable capacitor \(some people also call it a trimmer capacitor\) which turns the`21\.500`MHz frequency into`21\.47727`MHz\. Why did the designers make it adjustable? The likely answer is that Nintendo feared the oscillator would deteriorate over time, and technicians would be able to tune it\. They may not have been wrong since a common issue for the Super Nintendo console is to render in black and white\. The solution is often to adjust the capacitor \(or replace the oscillator\)[\[12\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_12)\. Dividers --- There are only two "master" clocks in the console but none of the processors use them\. What happens is that these masters go into dividers to create new clocks\. The Ricoh 5A22 CPU for example, runs at 1/6 of the master clock, which results in`3\.579545`MHz\. Luckily, the SNES community \(and[nocash](https://fabiensanglard.net/snes_hearts/%3Ca%20href=)in particular\) has documented all these dividers[\[13\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_13)\. ``` NTSC Timings NTSC crystal 21.4772700MHz (X1) NTSC color clock 3.57954500MHz (21.4772700MHz/6) (generated by PPU2 chip) NTSC master clock 21.4772700MHz (21.4772700MHz/1) (without multiplier/divider) NTSC dot clock 5.36931750MHz (21.4772700MHz/4) (generated by PPU chip) NTSC cpu clock 3.57954500MHz (21.4772700MHz/6) (without waitstates) NTSC cpu clock 2.68465875MHz (21.4772700MHz/8) (short waitstates) NTSC cpu clock 1.78977250MHz (21.4772700MHz/12) (joypad waitstates) NTSC frame rate 60.09880627Hz (21.4772700MHz/(262*1364-4/2)) APU Timings APU oscillator 24.576MHz (X2) DSP sample rate 32000Hz (24.576MHz/24/32) SPC700 cpu clock 1.024MHz (24.576MHz/24) SPC700 timer 0+1 8000Hz (24.576MHz/24/128) SPC700 timer 2 64000Hz (24.576MHz/24/16) CIC clock 3.072MHz (24.576MHz/8) Expansion Port 8.192MHz (24.576MHz/3) ``` In total there are fifteen clocks in the Super Nintendo\. Hopefully this solves the mystery of the "missing" oscillator from the documentation\. Enhancement chips --- The`SYS\-CLK`\(21\.47727MHz\) line is fed into the cartridge port\. This signal is normally not needed by the components in the cartridge\. These are made of ROM containing the game instructions and assets which don't need a clock signal\. So why route it there? The answer is that it allows cartridges to embed processors of their own, called enhancement chips[\[14\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_14)\. The most famous of these games is StarFox which features a "mario" SuperFX processor\. The MARIO version has an internal divider which halves the clock to`10\.738635`MHz\. Later, GSU\-1, versions ran at the full`21\.47727`MHz clock\. ![](https://fabiensanglard.net/snes_hearts/SPAL-FO-1-pcb-front-9322.webp)*Starfox PCB \(source[snescentral](https://snescentral.com/pcb.php?id=0636&num=12&side=front)\)\.*There is a second CLK line fed into the cartridge\. It is`CIC\-CLK`\(3\.072MHz\) which is fed in the CIC chip located in the cartridge[\[15\]](https://fabiensanglard.net/snes_hearts/index.html#footnote_15)\. However`SYS\-CLK`\(21\.47727MHz\) was not always suitable\. Some games, like Megaman X2 used a CX4 enhancement chip for graphic effects\. If we open a MM2 PCB, we find a`20`MHz oscillator \(X1 slot\) which feeds the CX4`CLK`pin\. ![](https://fabiensanglard.net/snes_hearts/SHVC-2DC0N-01-pcb-front.webp)*Megaman X2 PCB\. Notice the 20Mhz oscillator \(source[snescentral](https://snescentral.com/pcbboards.php?chip=SHVC-2DC0N-01)\)\.*References --- [^](https://fabiensanglard.net/snes_hearts/index.html#back_1)\[ 1\]Of course it is not something you can do with modern system and their microscopic SOCs\. But for 90's hardware such as the Super Nintendo, it is no problem\.\.[^](https://fabiensanglard.net/snes_hearts/index.html#back_2)\[ 2\][68000 pinout](https://wiki.console5.com/wiki/File:MC68000-MC68HC000-MC68010-68-QP-Pinout.png)[^](https://fabiensanglard.net/snes_hearts/index.html#back_3)\[ 3\][Pentium pinout](https://datasheets.chipdb.org/Intel/x86/Pentium/24199710.PDF)[^](https://fabiensanglard.net/snes_hearts/index.html#back_4)\[ 4\][6502 pinout](https://user.xmission.com/~trevin/atari/6502_pinout.html)[^](https://fabiensanglard.net/snes_hearts/index.html#back_5)\[ 5\][NBA Jam Kit](https://www.arcade-museum.com/manuals-videogames/N/NBA_Jam_Kit_Operations_Manual_1643123101_April_1993.pdf)[^](https://fabiensanglard.net/snes_hearts/index.html#back_6)\[ 6\][CPS\-A schematics](https://petitl.fr/cps2/DL-0311/)[^](https://fabiensanglard.net/snes_hearts/index.html#back_7)\[ 7\][CPS\-B schematics](https://petitl.fr/cps2/DL-0921/)[^](https://fabiensanglard.net/snes_hearts/index.html#back_8)\[ 8\][Genesis VDP schematics](https://md.railgun.works/index.php?title=VDP)[^](https://fabiensanglard.net/snes_hearts/index.html#back_9)\[ 9\][STREET FIGHTER II, SOUND SYSTEM INTERNALS](https://fabiensanglard.net/sf2_sound_system/)[^](https://fabiensanglard.net/snes_hearts/index.html#back_10)\[10\][msm6295 datasheet](https://fabiensanglard.net/sf2_sound_system/MSM6295.pdf)[^](https://fabiensanglard.net/snes_hearts/index.html#back_11)\[11\][SNES Development Manual, fig 2\-22\-1](https://archive.org/details/SNESDevManual/book1/page/n97/mode/2up)[^](https://fabiensanglard.net/snes_hearts/index.html#back_12)\[12\][Fixing a Super Nintendo That Won’t Output Color](https://www.instructables.com/Fixing-a-Super-Nintendo-That-Wont-Output-Color/)[^](https://fabiensanglard.net/snes_hearts/index.html#back_13)\[13\][SNES Timing Oscillators](https://problemkaputt.de/fullsnes.htm#snestimingoscillators)[^](https://fabiensanglard.net/snes_hearts/index.html#back_14)\[14\][SNES Enhancement Chips \(Super FX, DSP1, S\-DD1, SA\-1 etc\.\)](https://www.youtube.com/watch?v=Q1UyQDqHBfA)[^](https://fabiensanglard.net/snes_hearts/index.html#back_15)\[15\][10NES, the Super Nintendo copy protection](https://fabiensanglard.net/10nes) --- \*

Similar Articles

Inside the Super Nintendo cartridges

Fabien Sanglard

A detailed technical analysis of Super Nintendo cartridges, covering CIC copy protection, ROM size distribution, SRAM with battery backup, and enhancement processors like the Super FX chip.

Carving the Super Nintendo Video System

Fabien Sanglard

A detailed exploration of the Super Nintendo's video system design, explaining CRT technology and engineering choices from a Nintendo engineer's perspective.

How the SNES Graphics System works

Fabien Sanglard

A detailed technical explanation of the Super Nintendo's graphics hardware, including the PPU1 and PPU2 chips, VRAM, OAM, and CGRAM, based on schematics by Jonathon Donaldson.

The evolution of the Super Nintendo motherboard

Fabien Sanglard

This article details the evolution of Super Nintendo motherboard revisions over its 12-year lifespan, highlighting how Nintendo reduced the number of chips from fifteen to nine through generations like Classic, APU, and 1-CHIP.

SNES: Sprites and backgrounds rendering

Fabien Sanglard

The article explains how the SNES PPUs render sprites and backgrounds under tight VRAM bandwidth constraints, describing the hardware trade-offs in different video modes.