@nrehiew_: This was great! A fun followup is given some arbitrary topology and architecture, compute what is the expected compute/…

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A tweet reply to a blog post about collective communication in TPU/GPU clusters, suggesting a follow-up to compute expected compute/communication duration for a 1T MoE on Blackwell NVL72 and estimate theoretical MFU and bottlenecks.

This was great! A fun followup is given some arbitrary topology and architecture, compute what is the expected compute/comm duration in a training step? Say a 1T Dsv3 style MoE on Blackwell NVL72s, what sort of theoretical MFU can one expect? What is the largest bottleneck? https://t.co/l1WZIVh3oe
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Cached at: 07/16/26, 12:01 AM

This was great! A fun followup is given some arbitrary topology and architecture, compute what is the expected compute/comm duration in a training step?

Say a 1T Dsv3 style MoE on Blackwell NVL72s, what sort of theoretical MFU can one expect? What is the largest bottleneck? https://t.co/l1WZIVh3oe

Aleksa Gordić (水平问题) (@gordic_aleksa): New in-depth blog post time: “Inside TPU and GPU Clusters: The Anatomy of Collective Communication”.

If you want to deeply understand the core primitives behind scaling the training / inference for MoEs and dense transformers, going a level below FSDP, expert parallelism, data

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