Cached at:
05/16/26, 12:35 AM
# Cerelog’s ESP-EEG is a new 8 channel biosensing board at a hobbyist-friendly price
Source: [https://www.autodidacts.io/cerelog-esp-eeg-affordable-openbci-like-board/](https://www.autodidacts.io/cerelog-esp-eeg-affordable-openbci-like-board/)
I recently ran across a new open\-source \(or is it[source\-available](https://github.com/Cerelog-ESP-EEG/ESP-EEG/blob/main/LICENSE?ref=autodidacts.io)?\) EEG board that looks interesting: the Cerelog ESP\-EEG\.
Cerelog ESP\-EEG development board in actionAt its heart is the Texas Instruments ADS1299 \(24\-bit, 8\-channel\) analog\-digital converter, the same chip the OpenBCI Cyton uses\.
So what's different or better about the Cerelog? From my perusal of the materials, it seems that the selling point is cleaner signal due to true closed\-loop active bias, at a price point close to the price of the OpenBCI when it launched \(less than half the price of the Cyton now\)\.
Software support includes a fork of the OpenBCI GUI \(via Lab Streaming Layer\) and Brainflow\.
The project is by former SpaceX hardware engineer Simon Hakimian\.
Git repository with[firmware](http://https//github.com/Cerelog-ESP-EEG/ESP-EEG/blob/main/firmware/esp32_firmware.ino?ref=autodidacts.io)and[schematic](http://https//github.com/Cerelog-ESP-EEG/ESP-EEG/blob/main/hardware/schematic.pdf?ref=autodidacts.io)here:
⇒[https://github\.com/Cerelog\-ESP\-EEG/ESP\-EEG](https://github.com/Cerelog-ESP-EEG/ESP-EEG?ref=autodidacts.io)
Product page:
⇒[https://www\.cerelog\.com/eeg\_researchers\.html](https://www.cerelog.com/eeg_researchers.html?ref=autodidacts.io)
Usage guide:
⇒[https://www\.cerelog\.com/eeg\_researchers\_guide\.html](https://www.cerelog.com/eeg_researchers_guide.html?ref=autodidacts.io)
Socials:
⇒[https://x\.com/CerelogOfficial](https://x.com/CerelogOfficial?ref=autodidacts.io)
Announcement post on Reddit r/BCI:
⇒[https://old\.reddit\.com/r/BCI/comments/1polj4b/i\_designed\_an\_open\_source\_8channel\_eeg\_board/](https://old.reddit.com/r/BCI/comments/1polj4b/i_designed_an_open_source_8channel_eeg_board/?ref=autodidacts.io)
More info about where this is going:
⇒[https://www\.cerelog\.com/investor\_info\.html](https://www.cerelog.com/investor_info.html?ref=autodidacts.io)
Cerelog also has a tCDS board available for pre\-order:
⇒[https://www\.cerelog\.com/tdcs\_researchers\.html](https://www.cerelog.com/tdcs_researchers.html?ref=autodidacts.io)
YouTube video:
⇒[https://www\.youtube\.com/watch?v=6XKdIbguI00](https://www.youtube.com/watch?v=6XKdIbguI00&ref=autodidacts.io)
**Caveats**:
- It has hardware support for Bluetooth/Wifi, but the firmware isn't ready yet, so for the time being it can only be used with USB, which means it isn't electrically isolated, which means**absolutely don't ever use it with a desktop computer or a laptop that is charging**\.
- Some of the promo materials sound like they*could*have been hallucinated by an LLM; but then, investor\-speak has never sounded human to me\.
- Though the schematics and firmware are open source \(MIT Licence, and CC\-BY\-NC\-SA 4\.0\), the PCB layout files are specifically*not*available, and the firmware/schematics only allow**non\-commercial use**\.
- In the guide[it says](https://www.cerelog.com/eeg_researchers_guide.html?ref=autodidacts.io#:~:text=Firmware%20Access%20is%20Restricted,To%20receive%20the%20firmware%20source%20code%20or%20if%20you%20need%20the%20code%20to%20change%20montages%2C%20please%20email%20support%40cerelog.com%20with%20your%20proof%20of%20purchase%20(e.g.%2C%20order%20number).%20Firmware%20can%20be%20modified%20and%20flashed%20using%20the%20Arduino%20IDE.)the firmware is not available unless you email;[elsewhere it says](https://github.com/Cerelog-ESP-EEG/ESP-EEG/blob/main/LICENSE?ref=autodidacts.io)it's open source under MIT licence\. And in[some places](https://github.com/Cerelog-ESP-EEG/ESP-EEG/tree/main/hardware?ref=autodidacts.io#:~:text=The%20hardware%20design%20files%20in%20this%20repository%20are%20strictly%20for%20NON%2DCOMMERCIAL%20use)it says the hardware is CC\-BY\-NC\-SA 4\.0, and[elsewhere it says](https://github.com/Cerelog-ESP-EEG/ESP-EEG/blob/main/LICENSE?ref=autodidacts.io)it's merely CC\-BY\-SA 4\.0\. I'm confused\!
**Update:**Simon has[clarified the licencing](https://news.ycombinator.com/item?id=46503132&ref=autodidacts.io): “Regarding licensing, sorry about the confusion between my repo init and the docs\. I have updated the repo to clarify the distinction: Firmware & Software: MIT License\. I want people to build whatever they want on top of the stack\. Hardware Schematics: CC\-BY\-NC\-SA \(Non\-Commercial\)\. Why the split? Since I am a solo bootstrapper, I need to protect the hardware from low\-effort commercial clones while I get the business off the ground\. But I strongly believe in "Source Available" schematics so researchers and engineers can debug, learn, and modify their own units, hence the CC\-BY\-NC\-SA choice for the board files\.”
**Questions:**
- This is so similar to the OpenBCI, why not just fork the OpenBCI hardware and software, and add true closed\-loop active bias?- **Update:**Simon[responds](https://news.ycombinator.com/item?id=46503132&ref=autodidacts.io): “Why start fresh? It was an architecture decision\. The Cyton uses a PIC32 \+ RFduino stack\. I wanted to handle everything natively on the ESP32 for high\-bandwidth WiFi streaming, which required a ground\-up redesign\. I also wanted to add onboard LiPo charging and the ability to experiment with different filter topologies\. Building it from scratch helped me uncover a lot of subtle design constraints that aren't obvious until you dig into the layout\.”