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The paper identifies two causes why logic gate networks fail to benefit from increased depth and proposes Input-Anchored Logic Gate Networks (IALGNs) that condition each layer on original inputs, achieving consistent depth-accuracy improvements beyond 100 layers.
This paper introduces Differentiable Logic Gate Networks (Diff-Logic) as a hardware-native alternative to conventional neural networks for real-time EEG classification on edge devices, achieving competitive performance with significantly lower latency and model size.
Alex Mordvintsev introduces MorphoHDL, a minimal language prototype for growing boolean circuits using size-agnostic graph rewrite rules.