ReRAM-aware Model Finetuning addressing I-V Non-linearity and Retention Errors
Summary
Proposes a finetuning-based hardware-aware training algorithm to mitigate I-V non-linearity and retention errors in ReRAM crossbar arrays, enabling robust DNN deployment with minimal overhead. Evaluated on image classification and QA tasks, achieving near-baseline accuracy.
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# ReRAM-aware Model Finetuning addressing I-V Non-linearity and Retention Errors Source: [https://arxiv.org/abs/2606.17471](https://arxiv.org/abs/2606.17471) [View PDF](https://arxiv.org/pdf/2606.17471) > Abstract:Traditional CPU, GPU, and NPU architectures are increasingly limited by the von Neumann bottleneck\. While In\-Memory Computing \(IMC\) using ReRAM crossbar arrays offers a high\-density, energy\-efficient alternative, its practical deployment is constrained through their non\-idealities\. Existing hardware\-aware training frameworks often require training from scratch, which is computationally prohibitive for modern large\-scale models\. In this work, we propose a finetuning\-based hardware\-aware training algorithm that enables robust DNN deployment on ReRAM with minimal training overhead\. Our approach mitigates I\-V non\-linearity by applying a range\-shrunk sinh transformation and incorporates retention errors directly into a regularization loss during the finetuning process\. We evaluate our framework across models and tasks such as image classification and question\-answering \(QA\)\. Experimental results demonstrate that our method achieves similar accuracy on large\-scale models like ResNet18 and DeiT\-Tiny as the base model\. In\-case of ImageNet for MobileNetV3 families the technique has only less than 2% accuracy degradation\. Further, applying the technique on the SQuAD v2 dataset results in only 1 point degradation of F\-1 score\. ## Submission history From: Ching\-Yi Lin \[[view email](https://arxiv.org/show-email/a606c659/2606.17471)\] **\[v1\]**Tue, 16 Jun 2026 03:29:51 UTC \(4,429 KB\)
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