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SK Hynix introduces CMM-Ax, an ASIC-based CXL-PNM solution developed with Marvell Technology, designed to overcome memory bottlenecks in long-context LLM inference, achieving up to 5.5× higher throughput than GPU-only systems.
The article deeply deconstructs how CXL technology breaks the AI memory wall, analyzes memory bottlenecks from training to inference stages, and the application prospects of CXL in data centers.
Meta developed a custom CXL bridge chip (Vistara) to reuse older DIMMs in new servers, addressing memory shortages and reducing costs without significant performance loss.
Meta is reusing legacy DDR4 server memory in new DDR5-only servers by developing a custom CXL 2.0 chip that bridges the two memory types, reducing hardware costs.
XCENA, a chip startup founded by Samsung and SK Hynix veterans, raised $135M to develop a memory-centric chip that handles AI inference tasks near DRAM, reducing costly data transfers between CPUs and GPUs. The company's MX1 chip is expected to improve efficiency and reduce infrastructure costs.