fpga

This paper explores optimizing Transformer neural network inference on FPGAs for real-time anomaly detection in financial time series, demonstrating efficient implementation on a PYNQ-Z2 board.

An FPGA expert recreated the F-14 Tomcat's Central Air Data Computer using an FPGA and tested it in a 3D-printed model of the fighter, which controls the swing-wing system. The recreation uses the MP944 microprocessor, which some claim was the world's first microprocessor.

The author describes designing a custom CPU at the logic gate level, integrating DDR3 memory with cache, and successfully running Doom on an FPGA, which went viral.

Chinese researchers have developed an all-optical interconnect system that links standard electronic chips, boosting AI distributed inference speeds by over 100 times while using just one-ninth of typical computational resources. The breakthrough, published in National Science Review, uses silicon photonic transceiver chips and FPGAs to achieve dramatic efficiency gains.

RISCBoy is an open-source portable gaming console built with a RISC-V CPU and raster graphics pipeline, implemented on an iCE40 FPGA. The project includes the processor design, graphics hardware, PCB layout, and is fully open-source.

The Apple Lisa computer has been faithfully implemented inside an FPGA, with modern enhancements including HDMI video, USB input, and low power consumption. The project is fully open-source and runs on a custom PCB.

ProWAFT is a proactive workload-aware fault-tolerance framework for FPGA-based CNN accelerators that uses partial reconfiguration to selectively apply triple modular redundancy (TMR), minimizing a composite objective over latency, energy, and reliability risk.

This paper presents a programmable probabilistic computer with one million p-bits by networking FPGAs, achieving Gibbs sampling at over a trillion flips per second for Ising models while introducing a design rule for scaling beyond single-chip limits.

Google's TPU uses the systolic array architecture from 1978 to accelerate matrix multiplication with less memory movement. The post shares links to the original paper and TPU design, and suggests building a small-scale version on an FPGA.

Yuri Zaporozhets of QRV Systems has built a RISC-V-based personal computer and a mainframe on an FPGA, and rewritten QNX twice. His latest OS QSOE is gaining attention in the FOSS world.

The article explains the Early Start memory access technique in Intel's 80386, which hides memory latency by overlapping address generation with the previous instruction's last cycle. It describes the implementation of this technique in the z386 FPGA core, achieving ao486-class performance and a 39% improvement in Doom FPS.

Modos launches Modos Flow, a 13.3-inch color e-paper monitor with 60Hz refresh rate, touch input, and an open-source display controller called Enchanter, now crowdfunding on Crowd Supply.

A custom FPGA implementation of a Transformer with KV cache achieves 56,000 tokens per second at 80 MHz, running microGPT on a tiny LCD.

A custom digital chip designed gate-by-gate achieves over 56,000 tokens/sec running a Transformer with KV cache at just 80 MHz, prototyped on an FPGA.

After four years of development, the author created the Modos Flow, a 13.3-inch Eink monitor capable of 60fps by using pixel-level independent updates, and open-sourced all designs.

A technical blog post discussing methods for generating device clocks in FPGA and ASIC designs for interfacing with peripherals such as NOR flash and NAND flash.

This post explains the author's Master's thesis on using Kolmogorov-Arnold Networks (KANs) for ultrafast machine learning on FPGAs, achieving sub-microsecond inference and online learning via custom hardware architectures. It references two accepted papers: KANELÉ for LUT-based evaluation (FPGA 2026 Best Paper) and a method for on-FPGA online learning (ICML 2026).

TRINE is a single-bitstream FPGA accelerator and compiler for end-to-end multimodal inference, unifying diverse layers and incorporating runtime-adaptive compute modes, token pruning, and dependency-aware offloading, achieving up to 22.57x latency reduction over an RTX 4090 at 20-21W.

The author open-sourced a custom AI accelerator (atik) implemented on FPGA with native BF16 and attention support, demonstrating significant speedups over PyTorch for various models.

A community post requests that AMD restore Linux support for the free (BASIC) version of the Vivado FPGA design suite.