jet-tagging

LEAF 提出首个 LUT 感知的 Transformer/linformer 架构，面向 FPGA 上的超低延迟推理，在喷注标记基准上以更少 LUT 资源实现更高精度，适用于 CERN 等实时系统。

This paper presents a quantized, integer-only transformer implementation for jet tagging on AMD Versal AI Engines, including a reusable open-source framework that maps transformer layers to AIE tiles for low-latency trigger systems at CERN LHC.