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VeriTrace, a multi-agent system for automated Verilog RTL generation, introduces Agentic Temporal Exploration that gives debugging agents full control over signal selection, time windows, and iteration depth, achieving 100% Pass@1 on VerilogEval-V2 and outperforming baselines by +5.1%.
RTL-BenchMT is an agentic framework that automatically identifies and revises flawed cases and detects overfitting in RTL generation benchmarks, reducing human maintenance effort in EDA research.