@LinQingV: Overview of the Equipment Supply Chain for CXMT's Expansion: CXMT now has three 12-inch fabs: two in Hefei and one in Beijing. Fab 1 in Hefei has monthly capacity of 110k wafers, Fab 2 80k, and Beijing Fab 70k, totaling nearly 300k wafers, all fully loaded. Capacity tripled in two years; around 100k in early 2024, surging to 280-300k by end of 2025, with target in 2026…

ChangXin Memory Technologies (CXMT) Expansion: Equipment Supply Chain Panorama

CXMT currently operates three 12-inch fabs: two in Hefei and one in Beijing. Fab 1 in Hefei has a monthly capacity of 110,000 wafers, Fab 2 has 80,000 wafers, and the Beijing fab has 70,000 wafers. Combined, this totals nearly 300,000 wafers per month, all fully loaded. Capacity has tripled in two years, from approximately 100,000 wafers in early 2024 to 280,000–300,000 by end of 2025, with a target of stabilizing at 300,000 in 2026. By wafer count, CXMT’s global DRAM share has reached nearly 15%, but by revenue it’s only 3.97% — volume is up, but unit price is still catching up.

On the technology front, G4 (16nm class) is already in mass production. DDR5 yield has improved from 80% at end of 2024 to the 90% range now. G5 (15nm class) is scheduled for mass production by end of 2026. HBM2 went into production in the second half of last year, two years ahead of external expectations, primarily supplying Huawei’s Ascend 910. HBM3 front-end wafer capacity is mainly freed up within existing Hefei and Beijing fabs, targeting a monthly output of 60,000 wafers (about 20% of the total 300,000 wafer capacity). Back-end stacking and packaging will be handled by the new HBM packaging and test facility in Shanghai, which is slated to start production by end of 2026.

Capacity expansion continues. The new Shanghai fab will be built in two phases: Phase 1 with 100,000 wafers per month, ramping up in early 2027; Phase 2 also 100,000 wafers, starting in early 2028. Combined with the existing 300,000 wafers, CXMT’s long-term capacity target is over 500,000 wafers per month. Huawei is also building a 100,000-wafer-scale production line specifically to work with CXMT for HBM3 and LPDDR5X needed for the Ascend series, with full mass production starting in the second half of 2026.

From its IPO, CXMT raised 29.5 billion RMB, with 13 billion allocated to DRAM technology upgrades, 7.5 billion to production line upgrades, and 9 billion to forward-looking R&D. Multiple broker research notes indicate that about 20 billion RMB of this will directly become equipment procurement orders. Combined with the existing capex run rate of 71.2 billion RMB in 2024, this represents the most certain fundamental demand for domestic equipment makers over the next two years.

CXMT’s large-scale expansion creates substantial equipment procurement demand. The level of localization progress varies greatly by category.

Lithography is the largest external dependency, with domestic substitution rate below 5%. The main tool is ASML’s NXT:1980Di, outputting 275 wafers per hour (wph), covering down to 16nm nodes, and still procurable normally. Restricted by Dutch export controls are the NXT:2050i and above (295 wph), which have required licenses since September 2023, and licenses for China have essentially been stopped since January 2024. To correct a widely circulated misconception: the jump from 275 to 295 wph is a generational change from 1980Di to 2050i, not an iteration within the 1980 series. As CXMT moves below 15nm, this wall is unavoidable. Shanghai Micro Electronics Equipment’s (SMEE) 28/14nm DUV is still under development, so lithography remains an unsolvable gap in the short term.

Etch accounts for 25–30% of equipment investment, and is the deepest area of domestic substitution. NAURA’s ICP etchers hold over 50% market share in CXMT’s lines. AMEC’s CCP dielectric etchers achieve aspect ratios above 50:1, specifically used for TSV (Through-Silicon Via) in HBM. However, for extreme memory node aspect ratios of 100:1, holes must be perfectly parallel and straight — any deviation directly kills yield. Lam Research and Tokyo Electron remain the dominant suppliers in this high-end range.

Thin Film Deposition accounts for about 25% of equipment investment, with fine segmentation. PECVD for insulating layers, PVD for metal interconnects, ALD for high-k dielectrics in capacitors. Piotech’s PECVD has already entered CXMT’s DDR5 and LPDDR5 lines in volume. NAURA’s PVD covers aluminum/copper sputtering and titanium nitride sputtering. However, for the core high-k ALD for DRAM capacitors, Applied Materials and ASM International are hard to displace; Piotech’s ALD is still in qualification and ramp-up without large-scale deployment. Overall, PECVD and PVD have higher domestic penetration, while ALD is the lowest.

CMP accounts for only 5–7% of equipment investment. Hwatsing Technology holds over 90% of domestic CMP equipment sales, and its 12-inch Universal-300 has been introduced into CXMT’s lines. A new variable: AMEC’s acquisition of Hangzhou Zhonggui (passed review on April 29). Zhonggui’s 6-polisher architecture is a world first, with efficiency significantly higher than the mainstream 4-polisher design. Domestic CMP has officially moved from a single supplier to a dual-supplier structure.

Cleaning has 30–40% localization. ACM Research’s SAPS/TEBO megasonic cleaning covers 16–19nm FinFET and DRAM processes. Thermal processing at 40–50% localization; NAURA’s vertical oxidation furnaces lead the way, while Laipu Technology has grown domestic market share in laser annealing from 3% to 16% in two years, co-developing DRAM-appropriate tools with CXMT and YMTC. These segments are already viable.

The three weakest links are metrology/inspection, coater/developer, and ion implantation. Metrology/inspection localization is in the single digits. KLA holds 51–54% globally. Jingce Electronics has entered CXMT’s 12-inch lines, and SKF (Shenzhen King’semi) is also beginning to penetrate some areas, but the gap in high-end optical inspection and e-beam inspection remains large. Coater/developer localization is only 4%; Tokyo Electron commands over 90% market share in mainland China. ACM Research (Shanghai)’s coater/developer (Kingsemi) is the only mass-production alternative, but it’s currently only established in packaging; it hasn’t entered critical front-end layers. Ion implantation is similarly in single digits, with Wan Ye Kaitong (Kingsemi) having delivered over 40 units cumulatively. These three are the most elastic yet the hardest to move in the short term.

At YMTC’s Phase 3 fab, domestic equipment share exceeded 50% for the first time in Q1 2026, targeting 100%. CXMT’s domestic equipment penetration rate has already broken 45% but remains below YMTC’s Phase 3 level. The root cause is process technology. DRAM’s capacitor etching and lithography precision have a much higher dependency on advanced DUV than 3D NAND. NAND can circumvent lithography bottlenecks by stacking more layers, while DRAM must directly face the challenge — a structural difference, unrelated to willingness.

External constraints are tightening. On April 22, the U.S. House Foreign Affairs Committee voted to pass the MATCH Act, which Reuters called “the largest semiconductor export control legislation review in Congressional history.” The bill designates CXMT, SMIC, YMTC, Huawei, and Hua Hong as “covered facilities,” banning ASML’s DUV immersion lithography exports to CXMT, prohibiting allied countries from providing maintenance for existing equipment, and requiring the Netherlands and Japan to align with U.S. rules within 150 days. The main driver is Micron. If passed, the last gray channel (NXT:1980Di) will be blocked. CXMT itself is not yet on the BIS Entity List, but equipment imports have effectively been in the cage since the October 2022 restrictions on DRAM processes below 18nm.

A 45% localization rate means CXMT is walking on two legs: foreign equipment for yield, domestic equipment for supply chain security. The pressure from the MATCH Act is actually accelerating this process. Every percentage point of shift toward domestic equipment translates into concrete order growth for companies like NAURA, AMEC, Piotech, Hwatsing, and ACM Research. With the new Shanghai fab adding 200,000 wafers in two phases, plus ongoing technology upgrades at existing lines, domestic equipment makers face a highly certain demand window over the next two to three years.

Looking at a longer time scale, CXMT’s expansion is not just one company’s capex plan. Every time it successfully implements a new process node, the entire domestic 12-inch equipment platform gains another chance to be validated and reused. Etch and CMP have already proven this path; thin film deposition and cleaning are following; metrology and coater/developer are the next hard nuts to crack. Once this validation cycle gains momentum, the competitiveness of domestic equipment will accumulate at a pace far exceeding linear growth.